4 comments:
File src/soc/intel/common/pch/reset/reset.c:
* BIOS should ensure it does a global reset
* to reset both host and Intel ME by setting
* PCH PMC [B0:D31:F2 register offset 0xAC bit 20]
*/
96 chars wide on new files
For running text, I'd prefer shorter lines. I think reflowing this to fit in two lines would be good enough.
/* Now BIOS can write 0x06 or 0x0E to 0xCF9 port
* to global reset platform */
same here
Should fit in one line
/* If ME unable to reset platform then
* force global reset using PMC CF9GR register*/
same
I'd place the comment outside of the if-block, then it might fit in a single line. Plus, the braces can then be dropped.
Patch Set #2, Line 37: FSP_STATUS_RESET_REQUIRED_3
I think this value is chipset FSP-dependent? I see that we use _3 for most but APL uses _5. […]
The only exceptions are Apollo Lake and Denverton-NS. APL uses _3 for shutdown reset (although the integration guide says it is not currently used) and _5 for global reset, whereas DNV does not seem to support requesting any resets at all. If only APL needs special treatment, we could have an exception for it in here, but it's a bit ugly. We could also have a Kconfig option that only gets selected by APL. In any case, this difference is documented in integration guides and is small enough to account for it in common code.
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