[coreboot-gerrit] [S] Change in coreboot[main]: soc/intel/alderlake: Make C1e configurable

[Matt DeVillier (Code Review)]

Attention is currently required from: Jeremy Soller, Martin L Roth, Nick Vaccaro, Sean Rhodes, Subrata Banik, Tarun Tuli, Tim Crawford.

Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77088?usp=email )

Change subject: soc/intel/alderlake: Make C1e configurable
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Patch Set 5:

(1 comment)

File src/soc/intel/alderlake/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/77088/comment/18e48874_933c093f :
PS5, Line 1071: s_cfg->C1e = !config->disable_c1e;
since the original code was to disable based on CPUID, and boards can use CPUs having multiple CPUIDs, I think the best way to maintain current behavior for existing boards is to make this an enum rather than a bool, and have options {CPUID=0, ENABLED, DISABLED) so that not setting the register will maintain existing behavior, but boards/variants are free to override.