CK HU would like Duan huayang to review this change.

View Change

soc/mediatek/mt8192: Do dram full calibration

If no correct params was found in flash, do dram full calibration

Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
Change-Id: I2d4437a4e4c770de084927018d4dd3f2e8b87fb1
---
M src/soc/mediatek/mt8192/Makefile.inc
M src/soc/mediatek/mt8192/memory.c
2 files changed, 57 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/44570/1

diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc
index 19ab639..dd80beb 100644
--- a/src/soc/mediatek/mt8192/Makefile.inc
+++ b/src/soc/mediatek/mt8192/Makefile.inc
@@ -33,6 +33,16 @@
 ramstage-y += ../common/timer.c
 ramstage-y += ../common/uart.c
 
+MT8192_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8192
+
+DRAM_CBFS := $(CONFIG_CBFS_PREFIX)/dram
+$(DRAM_CBFS)-file := $(MT8192_BLOB_DIR)/dram.elf
+$(DRAM_CBFS)-type := stage
+$(DRAM_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG)
+ifneq ($(wildcard $($(DRAM_CBFS)-file)),)
+        cbfs-files-y += $(DRAM_CBFS)
+endif
+
 CPPFLAGS_common += -Isrc/soc/mediatek/mt8192/include
 CPPFLAGS_common += -Isrc/soc/mediatek/common/include
 
diff --git a/src/soc/mediatek/mt8192/memory.c b/src/soc/mediatek/mt8192/memory.c
index 84c13b7..96a8c91 100644
--- a/src/soc/mediatek/mt8192/memory.c
+++ b/src/soc/mediatek/mt8192/memory.c
@@ -64,6 +64,39 @@
 	return DRAMC_ERR_FAST_CALIBRATION;
 }
 
+static int dram_run_full_calibration(struct dramc_param *dparam)
+{
+	/* Load and run the provided blob for full-calibration if available */
+	struct prog dram = PROG_INIT(PROG_REFCODE, CONFIG_CBFS_PREFIX "/dram");
+
+	initialize_dramc_param(dparam);
+
+	if (prog_locate(&dram))
+		return -1;
+
+	if (cbfs_prog_stage_load(&dram))
+		return -2;
+
+	dparam->do_putc = do_putchar;
+
+	prog_set_entry(&dram, prog_entry(&dram), dparam);
+	prog_run(&dram);
+	if (dparam->header.status != DRAMC_SUCCESS) {
+		printk(BIOS_ERR, "Full calibration failed: status = %d\n",
+			dparam->header.status);
+		return -3;
+	}
+
+	if (!(dparam->header.flags & DRAMC_FLAG_HAS_SAVED_DATA)) {
+		printk(BIOS_ERR,
+		       "Full calibration executed without saving parameters. "
+		       "Please ensure the blob is built properly.\n");
+		return -4;
+	}
+
+	return 0;
+}
+
 static void mem_init_set_default_config(struct dramc_param *dparam,
 	u32 ddr_geometry)
 {
@@ -103,6 +136,20 @@
 	} else {
 		printk(BIOS_WARNING, "Failed to read calibration data from flash\n");
 	}
+
+	/* Run full calibration */
+	printk(BIOS_INFO, "DRAM-K: Full Calibration\n");
+	mem_init_set_default_config(dparam, ddr_geometry);
+	int err = dram_run_full_calibration(dparam);
+	if (err == 0) {
+		printk(BIOS_INFO, "Successfully loaded blobs and run DRAM calibration\n");
+
+		dparam->header.checksum = compute_checksum(dparam);
+		dparam_ops->write_to_flash(dparam);
+		printk(BIOS_DEBUG, "Calibration params saved to flash: "
+		       "version=%#x, size=%#x\n",
+		       dparam->header.version, dparam->header.size);
+	}
 }
 
 static void setup_dramc_voltage_before_calibration(void)

To view, visit change 44570. To unsubscribe, or for help writing mail filters, visit settings.