HAOUAS Elyes has uploaded this change for review.

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mb/intel/cannonlake_rvp: Remove direct 'include <soc/gpio.h>'

Don't directly include <soc/gpio.h>. All code using GPIO features
should always and only include <gpio.h>, which should indirectly
include the SoC-specific <soc/gpio.h>.

Change-Id: Ie3239a2eccab1e88c91029f31a67c71c2a091bfc
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
---
M src/mainboard/intel/cannonlake_rvp/bootblock.c
M src/mainboard/intel/cannonlake_rvp/chromeos.c
M src/mainboard/intel/cannonlake_rvp/mainboard.c
3 files changed, 2 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/41307/1

diff --git a/src/mainboard/intel/cannonlake_rvp/bootblock.c b/src/mainboard/intel/cannonlake_rvp/bootblock.c
index 22d63b9..6e1e984 100644
--- a/src/mainboard/intel/cannonlake_rvp/bootblock.c
+++ b/src/mainboard/intel/cannonlake_rvp/bootblock.c
@@ -2,7 +2,7 @@
 
 #include <baseboard/variants.h>
 #include <bootblock_common.h>
-#include <soc/gpio.h>
+#include <gpio.h>
 #include <variant/gpio.h>
 
 void bootblock_mainboard_init(void)
diff --git a/src/mainboard/intel/cannonlake_rvp/chromeos.c b/src/mainboard/intel/cannonlake_rvp/chromeos.c
index 98205bc..f5a8179 100644
--- a/src/mainboard/intel/cannonlake_rvp/chromeos.c
+++ b/src/mainboard/intel/cannonlake_rvp/chromeos.c
@@ -4,7 +4,6 @@
 #include <baseboard/variants.h>
 #include <boot/coreboot_tables.h>
 #include <gpio.h>
-#include <soc/gpio.h>
 #include <variant/gpio.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 
diff --git a/src/mainboard/intel/cannonlake_rvp/mainboard.c b/src/mainboard/intel/cannonlake_rvp/mainboard.c
index 950e24d..1f3c7b5 100644
--- a/src/mainboard/intel/cannonlake_rvp/mainboard.c
+++ b/src/mainboard/intel/cannonlake_rvp/mainboard.c
@@ -4,7 +4,7 @@
 #include <baseboard/variants.h>
 #include <device/device.h>
 #include <nhlt.h>
-#include <soc/gpio.h>
+#include <gpio.h>
 #include <soc/nhlt.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #include <variant/gpio.h>

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