Angel Pons uploaded patch set #5 to this change.

View Change

sb/intel/i82801jx: Drop `c3_latency`

The three mainboards using this southbridge do not define it. Note that
the default value of zero might be wrong, so add a FIXME comment.

Change-Id: Id16bb12a4628daf311bddf7e4701fc480d6b18e5
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M src/southbridge/intel/i82801jx/chip.h
M src/southbridge/intel/i82801jx/fadt.c
2 files changed, 1 insertion(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/42656/5

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Id16bb12a4628daf311bddf7e4701fc480d6b18e5
Gerrit-Change-Number: 42656
Gerrit-PatchSet: 5
Gerrit-Owner: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-Reviewer: Michael Niewöhner
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-MessageType: newpatchset