Sridhar Siricilla has uploaded this change for review.

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soc/intel/alderlake: Enable RMT

This patch modifies RMT UPDs in order to run RMT logic in FSP-M.

Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: I509671714bb779b44ce1bffa9b6ab7bc217fdcc4
---
M src/soc/intel/alderlake/romstage/fsp_params.c
1 file changed, 3 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/52012/1

diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c
index 3852467..62811b3 100644
--- a/src/soc/intel/alderlake/romstage/fsp_params.c
+++ b/src/soc/intel/alderlake/romstage/fsp_params.c
@@ -71,7 +71,9 @@
 
 	m_cfg->TsegSize = CONFIG_SMM_TSEG_SIZE;
 	m_cfg->SaGv = config->SaGv;
-	m_cfg->RMT = config->RMT;
+	m_cfg->RMT = 1;
+	m_cfg->RMTBIT = 1;
+	m_cfg->MrcFastBoot = 0;
 
 	/* CpuRatio Settings */
 	if (config->cpu_ratio_override)

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