Felix Held submitted this change.

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Approvals: build bot (Jenkins): Verified Marshall Dawson: Looks good to me, approved
soc/amd: remove unused PM_ISA_CONTROL definitions

ACPIMMIO_DECODE_REGISTER_04 is the definition in the common ACPIMMIO
code block that actually gets used. Also fix the indentation of the
ACPIMMIO register decode defines in the common code.

Change-Id: Ib2c460541be768fe05d8cc3d19a14dbd9c114a45
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48432
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
---
M src/soc/amd/common/block/include/amdblocks/acpimmio.h
M src/soc/amd/picasso/include/soc/southbridge.h
M src/soc/amd/stoneyridge/include/soc/southbridge.h
3 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio.h b/src/soc/amd/common/block/include/amdblocks/acpimmio.h
index 932ae47..62f7190 100644
--- a/src/soc/amd/common/block/include/amdblocks/acpimmio.h
+++ b/src/soc/amd/common/block/include/amdblocks/acpimmio.h
@@ -16,10 +16,10 @@
* this newer method of enable in PMx04.
*/

-#define ACPIMMIO_DECODE_REGISTER_24 0x24
+#define ACPIMMIO_DECODE_REGISTER_24 0x24
#define PM_24_ACPIMMIO_DECODE_EN BIT(0)

-#define ACPIMMIO_DECODE_REGISTER_04 0x4
+#define ACPIMMIO_DECODE_REGISTER_04 0x04
#define PM_04_BIOSRAM_DECODE_EN BIT(0)
#define PM_04_ACPIMMIO_DECODE_EN BIT(1)

diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h
index 6fdc5ab..c0a5057 100644
--- a/src/soc/amd/picasso/include/soc/southbridge.h
+++ b/src/soc/amd/picasso/include/soc/southbridge.h
@@ -27,8 +27,6 @@
#define CF9_IO_EN BIT(1)
#define LEGACY_IO_EN BIT(0)
#define SMB_ASF_IO_BASE 0x01 /* part of PM_DECODE_EN in PPR */
-#define PM_ISA_CONTROL 0x04
-#define MMIO_EN BIT(1)
#define PM_PCI_CTRL 0x08
#define FORCE_SLPSTATE_RETRY BIT(25)

diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index e0ffd61..78fe583 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -18,8 +18,6 @@
#define PM_DECODE_EN 0x00
#define CF9_IO_EN BIT(1)
#define LEGACY_IO_EN BIT(0)
-#define PM_ISA_CONTROL 0x04
-#define MMIO_EN BIT(1)
#define PM_PCI_CTRL 0x08
#define FORCE_SLPSTATE_RETRY BIT(25)
#define FORCE_STPCLK_RETRY BIT(24)

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ib2c460541be768fe05d8cc3d19a14dbd9c114a45
Gerrit-Change-Number: 48432
Gerrit-PatchSet: 2
Gerrit-Owner: Felix Held <felix-coreboot@felixheld.de>
Gerrit-Reviewer: Felix Held <felix-coreboot@felixheld.de>
Gerrit-Reviewer: Jason Glenesk <jason.glenesk@gmail.com>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd@gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: merged