Felix Held has uploaded this change for review.

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[UNTESTED] nb/amd/pi/00730F01: request binaryPI to use \_SB_ scope in PSTATE SSDT

Instead of having binaryPI generate a PSTATE SSDT that uses \_PR_ as the
scope for the CPU objects and patching this SSDT in coreboot to use the
\_SB_ scope in patch_ssdt_processor_scope, request binaryPI to use the
\_SB_ scope instead by setting the late platform configuration option
ProcessorScopeInSb to true.

TEST=Untested, but equivalent change for Stoneyridge works.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I411201b55cfee30ae41da4e6814679bdb49e9bf7
---
M src/northbridge/amd/pi/00730F01/northbridge.c
M src/northbridge/amd/pi/00730F01/state_machine.c
2 files changed, 21 insertions(+), 16 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/73386/1

diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c
index dab0e72..90d80db 100644
--- a/src/northbridge/amd/pi/00730F01/northbridge.c
+++ b/src/northbridge/amd/pi/00730F01/northbridge.c
@@ -558,21 +558,6 @@
 	acpigen_pop_len();
 }
 
-static void patch_ssdt_processor_scope(acpi_header_t *ssdt)
-{
-	unsigned int len = ssdt->length - sizeof(acpi_header_t);
-	unsigned int i;
-
-	for (i = sizeof(acpi_header_t); i < len; i++) {
-		/* Search for _PR_ scope and replace it with _SB_ */
-		if (*(uint32_t *)((unsigned long)ssdt + i) == 0x5f52505f)
-			*(uint32_t *)((unsigned long)ssdt + i) = 0x5f42535f;
-	}
-	/* Recalculate checksum */
-	ssdt->checksum = 0;
-	ssdt->checksum = acpi_checksum((void *)ssdt, ssdt->length);
-}
-
 static unsigned long agesa_write_acpi_tables(const struct device *device,
 					     unsigned long current,
 					     acpi_rsdp_t *rsdp)
@@ -643,7 +628,6 @@
 	printk(BIOS_DEBUG, "ACPI:    * SSDT at %lx\n", current);
 	ssdt = (acpi_header_t *)agesawrapper_getlateinitptr(PICK_PSTATE);
 	if (ssdt != NULL) {
-		patch_ssdt_processor_scope(ssdt);
 		memcpy((void *)current, ssdt, ssdt->length);
 		ssdt = (acpi_header_t *)current;
 		current += ssdt->length;
diff --git a/src/northbridge/amd/pi/00730F01/state_machine.c b/src/northbridge/amd/pi/00730F01/state_machine.c
index ba34dab..ef6c624 100644
--- a/src/northbridge/amd/pi/00730F01/state_machine.c
+++ b/src/northbridge/amd/pi/00730F01/state_machine.c
@@ -68,6 +68,9 @@
 		Late->GnbLateConfiguration.FchIoapicId = CONFIG_MAX_CPUS;
 	}
 
+	/* Make binariPY use \_SB_ as processor object scope in PSTATE SSDT */
+	Late->PlatformConfig.ProcessorScopeInSb = true;
+
 	/* Code for creating CDIT requires hop count table. If it is not
 	 * present AGESA_ERROR is returned, which confuses users. CDIT is not
 	 * written to the ACPI tables anyway. */

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