1 comment:
File src/soc/mediatek/mt8183/gpio.c:
Patch Set #2, Line 107: void *reg = GPIO_TO_IOCFG_BASE(gpio.base) + EH_RSEL_OFFSET;
Or is it important that only I2C bus pins get this setting, and pins that could be muxed to I2C but […]
This APIs is provided to facilitate adjustment of different boards and different speed specifications during the coreboot phase. If there is no HS mode (more than 1MHz) requirement, all the EH values can be set to 0 and all the RSEL values can be set to 3 at once.
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