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1 comment:

• File src/soc/intel/skylake/acpi/pch.asl:

  • Patch Set #12, Line 32: /* IGD 0:2.0 */

    For this generation, the IGD is still spread across both chips and the ACPI relevant part […]

    You're right, it's quite confusing. In the EDS figure 2-6 it's shown in the Processor part. But the South BLM control is indeed in the PCH.

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