Attention is currently required from: Angel Pons.
Arthur Heymans uploaded patch set #16 to this change.
nb/intel/sandybridge: Cache cbmem in romstage
The compress postcar option will default to 'y' with this.
Change-Id: I00de8bc42c5bfbe75cb1fdfd04d5e7ffc74b56e9
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
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M src/cpu/intel/model_206ax/Kconfig
1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/37200/16
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