Jérémy Compostella has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/77615?usp=email )
Change subject: [UNDERTESTS] soc/intel/common: Fix creation of non-existant efficient cores ......................................................................
[UNDERTESTS] soc/intel/common: Fix creation of non-existant efficient cores
commit b793aa3bca5a3f8a6c4ef5a28925a1aeebf426c8 ("soc/intel/common: Order the CPUs based on their APIC IDs") sort algorithnm leads to the creation of invalid `Local x2APIC' entries in the MADT (APIC) ACPI table.
It results in the kernel either: 1. Filtering them out when the random ID >= MAX_LOCAL_APIC (32768) 2. Fail to filter out when because the the ID ends up being a negative number (0xfxxxxxxx) leading to efficient core(s) being considered bad and disabled.
Change-Id: I19c7aa51f232bf48201bd6d28f108e9120a21f7e Signed-off-by: Jeremy Compostella jeremy.compostella@intel.com --- M src/soc/intel/common/block/acpi/cpu_hybrid.c 1 file changed, 9 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/77615/1
diff --git a/src/soc/intel/common/block/acpi/cpu_hybrid.c b/src/soc/intel/common/block/acpi/cpu_hybrid.c index 9a7b768..a252be2 100644 --- a/src/soc/intel/common/block/acpi/cpu_hybrid.c +++ b/src/soc/intel/common/block/acpi/cpu_hybrid.c @@ -54,12 +54,19 @@ uint32_t i, j = 0;
for (i = 0; i < ARRAY_SIZE(cpu_apic_info.apic_ids); i++) { - if (cpu_infos[i].cpu->path.apic.core_type == CPU_TYPE_PERF) + switch (cpu_infos[i].cpu->path.apic.core_type) { + case CPU_TYPE_PERF: cpu_apic_info.apic_ids[perf_core_cnt++] = cpu_infos[i].cpu->path.apic.apic_id; - else + break; + + case CPU_TYPE_EFF: eff_apic_ids[eff_core_cnt++] = cpu_infos[i].cpu->path.apic.apic_id; + break; + default: + /* Skip */ + } }
if (perf_core_cnt > 1)