Attention is currently required from: Reka Norman, Paul Menzel, Rizwan Qureshi, Krishna P Bhat D, Usha P, Patrick Rudolph, Kangheui Won.

Usha P uploaded patch set #3 to this change.

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soc/intel/alderlake: Add support for ADL-N PCH

Introduce the `SOC_INTEL_ALDERLAKE_PCH_N` Kconfig option and
use it to specify the correct amount of PCIe I/O.

Document number 645550 indicates that Alder Lake-N has
9 PCH root ports and no CPU root ports.

Document number 645548 indicates ADL-N has 5 clock sources
and 5 clock request signals.

Signed-off-by: Usha P <usha.p@intel.com>
Change-Id: I7ebbcdcdb1ccc34b80ec71ac3e591fe4ad6b1904
---
M src/soc/intel/alderlake/Kconfig
1 file changed, 9 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/59752/3

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