Michał Żygowski uploaded patch set #3 to this change.

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soc/intel/braswell/smbus: Init SMBus

Using Intel southbridge common implementation to retrieve SPD from DIMMs
causes FSP memory init to hang. Initialize SMBus as in Intel SoC common
before issuing any transactions to let FSP properly initialize memory.
Also make SMBus support compatible with SPD libary using Intel SB common
SMBus API.

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I92a2c5a6d0b38e5658cfdc017041f12717dabdd5
---
M src/soc/intel/braswell/Makefile.inc
A src/soc/intel/braswell/include/soc/smbus.h
M src/soc/intel/braswell/romstage/romstage.c
A src/soc/intel/braswell/smbus.c
4 files changed, 89 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/32062/3

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