Marx Wang has uploaded this change for review.

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soc/intel/apollolake: Enable 2x refresh rate to mitigate RH vulnerability

We must enable 2x refresh rate in order to mitigate Row Hammer
vulnerability.

BUG=N/A
TEST=run suspend_stress_test with memory check for 2500 cycles.

Change-Id: I0235fc7906626f28f14367c283433e5b066cc89a
---
M src/soc/intel/apollolake/meminit.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/48510/1
diff --git a/src/soc/intel/apollolake/meminit.c b/src/soc/intel/apollolake/meminit.c
index 8601571..9815a40 100644
--- a/src/soc/intel/apollolake/meminit.c
+++ b/src/soc/intel/apollolake/meminit.c
@@ -68,7 +68,7 @@
cfg->SliceHashMask = 0x9;
cfg->InterleavedMode = 2;
cfg->ChannelsSlicesEnable = 0;
- cfg->MinRefRate2xEnable = 0;
+ cfg->MinRefRate2xEnable = 1;
cfg->DualRankSupportEnable = 1;
/* Don't enforce a memory size limit. */
cfg->MemorySizeLimit = 0;

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I0235fc7906626f28f14367c283433e5b066cc89a
Gerrit-Change-Number: 48510
Gerrit-PatchSet: 1
Gerrit-Owner: Marx Wang <marx.wang@intel.com>
Gerrit-MessageType: newchange