Attention is currently required from: Nico Huber, Furquan Shaikh, Patrick Rudolph, Tim Wawrzynczak, Angel Pons, Bernardo Perez Priego, Michael Niewöhner, Aaron Durbin.

Bernardo Perez Priego uploaded patch set #24 to this change.

View Change

soc/intel/common: Add romstage common stage file

This patch will ensures all intel soc is using common stage
files to make coreboot design flow align across all socs.

CPU, SA, PCH, MCH programming sequence might be different between
socs but the function call should route from same location across
all soc.

Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Change-Id: I06d43ac29f5e87ce731a470e5e145adea07ece4c
---
M src/soc/intel/common/Kconfig.common
A src/soc/intel/common/basecode/include/intelbasecode/romstage.h
A src/soc/intel/common/basecode/romstage/Kconfig
A src/soc/intel/common/basecode/romstage/Makefile.inc
A src/soc/intel/common/basecode/romstage/romstage.c
5 files changed, 181 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/37628/24

To view, visit change 37628. To unsubscribe, or for help writing mail filters, visit settings.