View Change
1 comment:
Commit Message:
Patch Set #5, Line 11: ECT enabled.
Thanks, but that is not what the commit message says. It says “FSP 2527 requires” this. […]
I will reformat the commit message. There was no bug in MRC, what I meant was since it was very early stages of the Project we were running with ECT disabled. Now with FSP 2527 on wards we can enable ECT and other memory configs. MRC is part of FSP Memory initialization.
To view, visit change 40023. To unsubscribe, or for help writing mail filters, visit settings.
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I674c30f4dfc1af6c0c4a460d66684545a190caf3
Gerrit-Change-Number: 40023
Gerrit-PatchSet: 6
Gerrit-Owner: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Gerrit-Reviewer: Furquan Shaikh <furquan@google.com>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro@google.com>
Gerrit-Reviewer: Raj Astekar <raj.astekar@intel.com>
Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak@chromium.org>
Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim@intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-Comment-Date: Mon, 06 Apr 2020 17:32:26 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Paul Menzel <paulepanter@users.sourceforge.net>
Comment-In-Reply-To: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Gerrit-MessageType: comment