Felix Singer has uploaded this change for review.

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soc/intel/denverton_ns: Allow using FSP repo

Change-Id: I615305da5865bef305f560f5c90482cf0937b25a
Signed-off-by: Felix Singer <migy@darmstadt.ccc.de>
---
M src/drivers/intel/fsp2_0/Kconfig
M src/soc/intel/denverton_ns/Kconfig
2 files changed, 12 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/30931/1

diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
index 8156d18..6f5ed2a 100644
--- a/src/drivers/intel/fsp2_0/Kconfig
+++ b/src/drivers/intel/fsp2_0/Kconfig
@@ -85,7 +85,8 @@
 	bool "Use the IntelFSP based binaries"
 	depends on ADD_FSP_BINARIES
 	depends on SOC_INTEL_APOLLOLAKE || SOC_INTEL_SKYLAKE || \
-		SOC_INTEL_KABYLAKE || SOC_INTEL_COFFEELAKE
+		SOC_INTEL_KABYLAKE || SOC_INTEL_COFFEELAKE || \
+		SOC_INTEL_DENVERTON_NS
 	help
 	  When selecting this option, the SoC must set FSP_HEADER_PATH
 	  and FSP_FD_PATH correctly so FSP splitting works.
diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig
index 1096549..dfb5c37 100644
--- a/src/soc/intel/denverton_ns/Kconfig
+++ b/src/soc/intel/denverton_ns/Kconfig
@@ -78,6 +78,16 @@
 	help
 	  The memory location of the Intel FSP-S binary for this platform.
 
+config FSP_HEADER_PATH
+	string "Location of FSP headers"
+	depends on MAINBOARD_USES_FSP2_0
+	default "3rdparty/fsp/DenvertonNSFspBinPkg/Include/"
+
+config FSP_FD_PATH
+	string
+	depends on FSP_USE_REPO
+	default "3rdparty/fsp/DenvertonNSFspBinPkg/FspBin/DenvertonNSFsp.fd"
+
 # CAR memory layout on DENVERTON_NS hardware:
 ## CAR base address - 0xfef00000
 ## CAR size 1MB - 0x100 (0xfff00)

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