Shelley Chen uploaded patch set #7 to this change.

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mb/google/hatch: Use MEM_CH_SEL to indicate single_channel sku

MEM_CH_SEL is used to indicate whether we are on a single or dual
channel device, where MEM_CH_SEL = 1 for single channel skus and
MEM_CH_SEL = 0 for dual channel skus. Initialize single_channel field
(from GPP_F2), which will in turn initialize MemorySpdPtr pointers in
cannonlake soc code. In the first build, we did not use GPP_F2, so we
need to add an internal pulldown as those early devices were all dual
channel devices.

BUG=b:123062346, b:122959294
BRANCH=None
TEST=Boot into current boards and ensure that we have 2 channels as expected
Also, verify that GPP_F2 is set to 0.

Change-Id: I89d022793580be603a93d0b177d73ce968529b5c
Signed-off-by: Shelley Chen <shchen@google.com>
---
M src/mainboard/google/hatch/romstage.c
M src/mainboard/google/hatch/variants/baseboard/gpio.c
M src/mainboard/google/hatch/variants/baseboard/include/baseboard/variants.h
M src/mainboard/google/hatch/variants/baseboard/memory.c
4 files changed, 29 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/31358/7

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I89d022793580be603a93d0b177d73ce968529b5c
Gerrit-Change-Number: 31358
Gerrit-PatchSet: 7
Gerrit-Owner: Shelley Chen <shchen@google.com>
Gerrit-Reviewer: Aamir Bohra <aamir.bohra@intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin@chromium.org>
Gerrit-Reviewer: Duncan Laurie <dlaurie@chromium.org>
Gerrit-Reviewer: Furquan Shaikh <furquan@google.com>
Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi@intel.com>
Gerrit-Reviewer: Shelley Chen <shchen@google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-MessageType: newpatchset