Angel Pons has uploaded this change for review.

View Change

soc/intel/broadwell/xhci.c: Align with Lynx Point

Change-Id: Idf40e2687b064c5ec7834e3c7d7ea9c8cb83c882
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M src/soc/intel/broadwell/xhci.c
1 file changed, 2 insertions(+), 7 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/45721/1
diff --git a/src/soc/intel/broadwell/xhci.c b/src/soc/intel/broadwell/xhci.c
index 319c9b1..6d824a5 100644
--- a/src/soc/intel/broadwell/xhci.c
+++ b/src/soc/intel/broadwell/xhci.c
@@ -138,18 +138,13 @@
return;

/* Set D0 state */
- reg16 = pci_read_config16(dev, XHCI_PWR_CTL_STS);
- reg16 &= ~XHCI_PWR_CTL_SET_MASK;
- reg16 |= XHCI_PWR_CTL_SET_D0;
- pci_write_config16(dev, XHCI_PWR_CTL_STS, reg16);
+ pci_update_config16(dev, XHCI_PWR_CTL_STS, ~PWR_CTL_SET_MASK, PWR_CTL_SET_D0);

if (!is_broadwell) {
/* This WA is only for lpt */

/* Clear PCI 0xB0[14:13] */
- reg32 = pci_read_config32(dev, 0xb0);
- reg32 &= ~((1 << 14) | (1 << 13));
- pci_write_config32(dev, 0xb0, reg32);
+ pci_and_config32(dev, 0xb0, ~((1 << 14) | (1 << 13)));

/* Clear MMIO 0x816c[14,2] */
reg32 = read32(mem_base + 0x816c);

To view, visit change 45721. To unsubscribe, or for help writing mail filters, visit settings.

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Idf40e2687b064c5ec7834e3c7d7ea9c8cb83c882
Gerrit-Change-Number: 45721
Gerrit-PatchSet: 1
Gerrit-Owner: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-MessageType: newchange