EricR Lai has uploaded this change for review.

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mb/google/zork/: Remove WRDD from Vilboz

After checked, this project doesn't need this feature.

BUG=b:173066178
BRANCH=zork
TEST=check no WRDD method in acpi.

Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I9a662953f3047d771f2df919ac80d0440842738e
---
A src/mainboard/google/brya/spd/Makefile.inc
A src/mainboard/google/brya/spd/dram_id.generated.txt
A src/mainboard/google/brya/spd/mem_list_variant.txt
M src/mainboard/google/zork/Kconfig
A src/soc/intel/alderlake/spd/lp4x-spd-1.hex
A src/soc/intel/alderlake/spd/lp4x-spd-2.hex
A src/soc/intel/alderlake/spd/lp4x-spd-3.hex
A src/soc/intel/alderlake/spd/lp4x-spd-4.hex
A src/soc/intel/alderlake/spd/lp4x-spd-5.hex
A src/soc/intel/alderlake/spd/lp4x-spd-6.hex
A src/soc/intel/alderlake/spd/lp4x-spd-7.hex
A src/soc/intel/alderlake/spd/lp4x-spd-8.hex
A src/soc/intel/alderlake/spd/lp4x_spd_manifest.generated.txt
M util/spd_tools/lp4x/gen_spd.go
14 files changed, 296 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/48621/1

diff --git a/src/mainboard/google/brya/spd/Makefile.inc b/src/mainboard/google/brya/spd/Makefile.inc
new file mode 100644
index 0000000..37e4c22
--- /dev/null
+++ b/src/mainboard/google/brya/spd/Makefile.inc
@@ -0,0 +1,8 @@
+## SPDX-License-Identifier: GPL-2.0-or-later
+## This is an auto-generated file. Do not edit!!
+
+SPD_SOURCES =
+SPD_SOURCES += lp4x-spd-1.hex      # ID = 0(0b0000)  Parts = K4U6E3S4AA-MGCL, H9HCNNNBKMMLXR-NEE
+SPD_SOURCES += lp4x-spd-3.hex      # ID = 1(0b0001)  Parts = K4UBE3D4AA-MGCL
+SPD_SOURCES += lp4x-spd-4.hex      # ID = 2(0b0010)  Parts = MT53E1G32D2NP-046 WT:A
+SPD_SOURCES += lp4x-spd-2.hex      # ID = 3(0b0011)  Parts = H9HCNNNFAMMLXR-NEE
diff --git a/src/mainboard/google/brya/spd/dram_id.generated.txt b/src/mainboard/google/brya/spd/dram_id.generated.txt
new file mode 100644
index 0000000..637fd23
--- /dev/null
+++ b/src/mainboard/google/brya/spd/dram_id.generated.txt
@@ -0,0 +1,6 @@
+DRAM Part Name                 ID to assign
+K4U6E3S4AA-MGCL                0 (0000)
+K4UBE3D4AA-MGCL                1 (0001)
+H9HCNNNBKMMLXR-NEE             0 (0000)
+MT53E1G32D2NP-046 WT:A         2 (0010)
+H9HCNNNFAMMLXR-NEE             3 (0011)
diff --git a/src/mainboard/google/brya/spd/mem_list_variant.txt b/src/mainboard/google/brya/spd/mem_list_variant.txt
new file mode 100644
index 0000000..c532d0d
--- /dev/null
+++ b/src/mainboard/google/brya/spd/mem_list_variant.txt
@@ -0,0 +1,5 @@
+K4U6E3S4AA-MGCL
+K4UBE3D4AA-MGCL
+H9HCNNNBKMMLXR-NEE
+MT53E1G32D2NP-046 WT:A
+H9HCNNNFAMMLXR-NEE
diff --git a/src/mainboard/google/zork/Kconfig b/src/mainboard/google/zork/Kconfig
index c1cbae9..88d6e97 100644
--- a/src/mainboard/google/zork/Kconfig
+++ b/src/mainboard/google/zork/Kconfig
@@ -267,6 +267,5 @@
 	select SAR_ENABLE
 	select USE_SAR
 	select GEO_SAR_ENABLE
-	select HAVE_REGULATORY_DOMAIN if BOARD_GOOGLE_VILBOZ
 
 endif # BOARD_GOOGLE_BASEBOARD_TREMBYLE || BOARD_GOOGLE_BASEBOARD_DALBOZ
diff --git a/src/soc/intel/alderlake/spd/lp4x-spd-1.hex b/src/soc/intel/alderlake/spd/lp4x-spd-1.hex
new file mode 100644
index 0000000..50f50e2
--- /dev/null
+++ b/src/soc/intel/alderlake/spd/lp4x-spd-1.hex
@@ -0,0 +1,32 @@
+23 11 11 0E 16 21 04 08 00 00 00 00 02 22 00 00
+00 00 04 FF 92 54 05 00 87 00 90 A8 90 C0 08 60
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diff --git a/src/soc/intel/alderlake/spd/lp4x-spd-2.hex b/src/soc/intel/alderlake/spd/lp4x-spd-2.hex
new file mode 100644
index 0000000..866b466
--- /dev/null
+++ b/src/soc/intel/alderlake/spd/lp4x-spd-2.hex
@@ -0,0 +1,32 @@
+23 11 11 0E 17 29 98 08 00 00 00 00 09 22 00 00
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diff --git a/src/soc/intel/alderlake/spd/lp4x-spd-3.hex b/src/soc/intel/alderlake/spd/lp4x-spd-3.hex
new file mode 100644
index 0000000..6db2d80
--- /dev/null
+++ b/src/soc/intel/alderlake/spd/lp4x-spd-3.hex
@@ -0,0 +1,32 @@
+23 11 11 0E 16 21 94 08 00 00 00 00 0A 22 00 00
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diff --git a/src/soc/intel/alderlake/spd/lp4x-spd-4.hex b/src/soc/intel/alderlake/spd/lp4x-spd-4.hex
new file mode 100644
index 0000000..c4180b6
--- /dev/null
+++ b/src/soc/intel/alderlake/spd/lp4x-spd-4.hex
@@ -0,0 +1,32 @@
+23 11 11 0E 17 29 04 08 00 00 00 00 02 22 00 00
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diff --git a/src/soc/intel/alderlake/spd/lp4x-spd-5.hex b/src/soc/intel/alderlake/spd/lp4x-spd-5.hex
new file mode 100644
index 0000000..77230e7
--- /dev/null
+++ b/src/soc/intel/alderlake/spd/lp4x-spd-5.hex
@@ -0,0 +1,32 @@
+23 11 11 0E 16 21 94 08 00 00 00 00 02 22 00 00
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diff --git a/src/soc/intel/alderlake/spd/lp4x-spd-6.hex b/src/soc/intel/alderlake/spd/lp4x-spd-6.hex
new file mode 100644
index 0000000..8da34f1
--- /dev/null
+++ b/src/soc/intel/alderlake/spd/lp4x-spd-6.hex
@@ -0,0 +1,32 @@
+23 11 11 0E 17 29 94 08 00 00 00 00 02 22 00 00
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diff --git a/src/soc/intel/alderlake/spd/lp4x-spd-7.hex b/src/soc/intel/alderlake/spd/lp4x-spd-7.hex
new file mode 100644
index 0000000..2fe6757
--- /dev/null
+++ b/src/soc/intel/alderlake/spd/lp4x-spd-7.hex
@@ -0,0 +1,32 @@
+23 11 11 0E 15 19 04 08 00 00 00 00 02 22 00 00
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diff --git a/src/soc/intel/alderlake/spd/lp4x-spd-8.hex b/src/soc/intel/alderlake/spd/lp4x-spd-8.hex
new file mode 100644
index 0000000..1fe256a
--- /dev/null
+++ b/src/soc/intel/alderlake/spd/lp4x-spd-8.hex
@@ -0,0 +1,32 @@
+23 11 11 0E 16 21 B4 08 00 00 00 00 0A 22 00 00
+00 00 04 FF 92 54 05 00 87 00 90 A8 90 C0 08 60
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diff --git a/src/soc/intel/alderlake/spd/lp4x_spd_manifest.generated.txt b/src/soc/intel/alderlake/spd/lp4x_spd_manifest.generated.txt
new file mode 100644
index 0000000..2b44d5b
--- /dev/null
+++ b/src/soc/intel/alderlake/spd/lp4x_spd_manifest.generated.txt
@@ -0,0 +1,19 @@
+H9HCNNNBKMMLXR-NEE,lp4x-spd-1.hex
+H9HCNNNFAMMLXR-NEE,lp4x-spd-2.hex
+K4U6E3S4AA-MGCL,lp4x-spd-1.hex
+K4UBE3D4AA-MGCL,lp4x-spd-3.hex
+MT53E1G32D2NP-046 WT:A,lp4x-spd-4.hex
+H9HKNNNCRMBVAR-NEH,lp4x-spd-5.hex
+MT53E1G64D4SQ-046 WT:A,lp4x-spd-6.hex
+MT53E512M32D2NP-046 WT:F,lp4x-spd-1.hex
+NT6AP256T32AV-J2,lp4x-spd-7.hex
+K4U6E3S4AA-MGCR,lp4x-spd-1.hex
+MT53E512M32D2NP-046 WT:E,lp4x-spd-1.hex
+H9HCNNNCPMMLXR-NEE,lp4x-spd-3.hex
+K4UBE3D4AA-MGCR,lp4x-spd-3.hex
+MT53E512M64D4NW-046 WT:E,lp4x-spd-5.hex
+MT53E1G64D8NW-046 WT:E,lp4x-spd-8.hex
+H9HCNNNCRMBLPR-NEE,lp4x-spd-5.hex
+H9HCNNNFBMBLPR-NEE,lp4x-spd-8.hex
+MT53D1G64D4NW-046 WT:A,lp4x-spd-6.hex
+MT53D512M64D4NW-046 WT:F,lp4x-spd-5.hex
diff --git a/util/spd_tools/lp4x/gen_spd.go b/util/spd_tools/lp4x/gen_spd.go
index e63ca8d..94cfb8d 100644
--- a/util/spd_tools/lp4x/gen_spd.go
+++ b/util/spd_tools/lp4x/gen_spd.go
@@ -29,11 +29,13 @@
 
 	PlatformTGL = 0
 	PlatformJSL = 1
+	PlatformADL = 0
 )
 
 var platformMap = map[string]int {
 	"TGL": PlatformTGL,
 	"JSL": PlatformJSL,
+	"ADL": PlatformADL,
 }
 
 var currPlatform int

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