Patrick Georgi merged this change.

View Change

Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
soc/intel: Add mem_rank info in SMBIOS

"mosys memory spd print all" returns incorrect memory ranks info.
This patch and 2 upcomming ones (one in FSP) will address the issue.

BUG=b:122329046
TEST=Boot to OS on Bobba variant of Octopus
BRANCH=octopus

Change-Id: I212215040e4786c258a9c604cc5c2bb62867c842
Signed-off-by: Francois Toguo <francois.toguo.fotso@intel.com>
Reviewed-on: https://review.coreboot.org/c/31235
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
---
M src/soc/intel/apollolake/meminit_util_apl.c
M src/soc/intel/apollolake/meminit_util_glk.c
M src/soc/intel/cannonlake/romstage/romstage.c
M src/soc/intel/common/smbios.c
M src/soc/intel/common/smbios.h
M src/soc/intel/icelake/romstage/romstage.c
M src/soc/intel/skylake/romstage/romstage_fsp20.c
7 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/src/soc/intel/apollolake/meminit_util_apl.c b/src/soc/intel/apollolake/meminit_util_apl.c
index 755d708..a11c5d8 100644
--- a/src/soc/intel/apollolake/meminit_util_apl.c
+++ b/src/soc/intel/apollolake/meminit_util_apl.c
@@ -85,6 +85,7 @@
src_dimm->SizeInMb,
memory_info_hob->MemoryType,
memory_info_hob->MemoryFrequencyInMHz,
+ 0,
channel_info->ChannelId,
src_dimm->DimmId,
dram_part_num,
diff --git a/src/soc/intel/apollolake/meminit_util_glk.c b/src/soc/intel/apollolake/meminit_util_glk.c
index db69f51..9bfdf0b 100644
--- a/src/soc/intel/apollolake/meminit_util_glk.c
+++ b/src/soc/intel/apollolake/meminit_util_glk.c
@@ -91,6 +91,7 @@
src_dimm->DimmCapacity,
memory_info_hob->MemoryType,
memory_info_hob->ConfiguredMemoryClockSpeed,
+ src_dimm->RankInDimm,
channel_info->ChannelId,
src_dimm->DimmId,
dram_part_num,
diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c
index 9e25e55..3755c83 100644
--- a/src/soc/intel/cannonlake/romstage/romstage.c
+++ b/src/soc/intel/cannonlake/romstage/romstage.c
@@ -92,6 +92,7 @@
src_dimm->DimmCapacity,
memory_info_hob->MemoryType,
memory_info_hob->ConfiguredMemoryClockSpeed,
+ src_dimm->RankInDimm,
channel_info->ChannelId,
src_dimm->DimmId,
(const char *)src_dimm->ModulePartNum,
diff --git a/src/soc/intel/common/smbios.c b/src/soc/intel/common/smbios.c
index bcddb78..0b1be88 100644
--- a/src/soc/intel/common/smbios.c
+++ b/src/soc/intel/common/smbios.c
@@ -20,13 +20,14 @@

/* Fill the SMBIOS memory information from FSP MEM_INFO_DATA_HOB in CBMEM.*/
void dimm_info_fill(struct dimm_info *dimm, u32 dimm_capacity, u8 ddr_type,
- u32 frequency, u8 channel_id, u8 dimm_id,
+ u32 frequency, u8 rank_per_dimm, u8 channel_id, u8 dimm_id,
const char *module_part_num, size_t module_part_number_size,
u16 data_width)
{
dimm->dimm_size = dimm_capacity;
dimm->ddr_type = ddr_type;
dimm->ddr_frequency = frequency;
+ dimm->rank_per_dimm = rank_per_dimm;
dimm->channel_num = channel_id;
dimm->dimm_num = dimm_id;
strncpy((char *)dimm->module_part_number,
diff --git a/src/soc/intel/common/smbios.h b/src/soc/intel/common/smbios.h
index 4750d3c..33b5d0d 100644
--- a/src/soc/intel/common/smbios.h
+++ b/src/soc/intel/common/smbios.h
@@ -21,7 +21,7 @@

/* Fill the SMBIOS memory information from FSP MEM_INFO_DATA_HOB in CBMEM.*/
void dimm_info_fill(struct dimm_info *dimm, u32 dimm_capacity, u8 ddr_type,
- u32 frequency, u8 channel_id, u8 dimm_id,
+ u32 frequency, u8 rank_per_dimm, u8 channel_id, u8 dimm_id,
const char *module_part_num, size_t module_part_number_size,
u16 data_width);

diff --git a/src/soc/intel/icelake/romstage/romstage.c b/src/soc/intel/icelake/romstage/romstage.c
index 3df4f4f..9a611bb 100644
--- a/src/soc/intel/icelake/romstage/romstage.c
+++ b/src/soc/intel/icelake/romstage/romstage.c
@@ -94,6 +94,7 @@
src_dimm->DimmCapacity,
memory_info_hob->MemoryType,
memory_info_hob->ConfiguredMemoryClockSpeed,
+ src_dimm->RankInDimm,
channel_info->ChannelId,
src_dimm->DimmId,
(const char *)src_dimm->ModulePartNum,
diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c
index 6fe79f6..f92ddca 100644
--- a/src/soc/intel/skylake/romstage/romstage_fsp20.c
+++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c
@@ -121,6 +121,7 @@
src_dimm->DimmCapacity,
ddr_type,
memory_info_hob->ConfiguredMemoryClockSpeed,
+ src_dimm->RankInDimm,
channel_info->ChannelId,
src_dimm->DimmId,
(const char *)src_dimm->ModulePartNum,

To view, visit change 31235. To unsubscribe, or for help writing mail filters, visit settings.

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I212215040e4786c258a9c604cc5c2bb62867c842
Gerrit-Change-Number: 31235
Gerrit-PatchSet: 13
Gerrit-Owner: Francois Toguo Fotso <francois.toguo.fotso@intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin@chromium.org>
Gerrit-Reviewer: Francois Toguo Fotso <francois.toguo.fotso@intel.com>
Gerrit-Reviewer: Furquan Shaikh <furquan@google.com>
Gerrit-Reviewer: Justin TerAvest <teravest@chromium.org>
Gerrit-Reviewer: Karthik Ramasubramanian <kramasub@google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Francois Toguo Fotso <francois.toguo.fotso@intel.corp-partner.google.com>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-MessageType: merged