Frans Hendriks uploaded patch set #4 to this change.

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soc/intel/braswell/chip.c: Configure LPSS devices in correct mode

LPSS devices can be configured in ACPI or PCI mode. The correct mode
must be reported to FSP.
Use config structure to report the correct mode.

BUG=N/A
TEST=Intel Cherry Hill

Change-Id: Ie271d8cb9f30f0c0ba538f1530cfb82f1306fea8
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
---
M src/soc/intel/braswell/chip.c
1 file changed, 23 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/29284/4

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