There must be something in AGESA that still sets the UC entries, keep getting the inconsistent MTRRs (but Linux fixes it by itself.) I will reinvestigate this and probably the uC mapping can be dropped for APs (IIRC it's 1MB from the top of RAM).

I dug a little bit more and notice that the InitPost sets additional MTRRs on BSP and sync APs MTRRs with BSP at some point. This results in [TOP_MEM - 16MB; TOP_MEM) var MTRR to be set as UC while there exists a [0 ; TOP_MEM) WB mapping with var MTRR. After investigating the AGESA code I have, it seems to be the C6 region storage allocated in InitPost (probably C6 is enabled as required per CPU boost). Since there is no UMA on apu2, this is the only reason I suspect. So the question is now whether we really should drop the UC mappings on BSP in the recover_postcar_frame function? Kyösti since you are the author of the mentioned function, maybe you could advice on this?

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Gerrit-Project: coreboot
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Gerrit-Change-Id: Iaa0d154e2c5b2052027d07ad26e31f3ff63ae9f3
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