Shelley Chen uploaded patch set #7 to this change.

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soc/intel/cannonlake: Add field to identify single channel memory

Variants of Hatch need to accommodate single channel DDR.  Also,
removing const modifier as we'll need to set these fields
incrementally now.

BUG=b:123062346, b:122959294
BRANCH=None
TEST=Boot into current boards and ensure that we have 2 channels as expected

Change-Id: Ice22b103664187834e255d1359bfd9b51993b5b6
Signed-off-by: Shelley Chen <shchen@google.com>
---
M src/soc/intel/cannonlake/cnl_memcfg_init.c
M src/soc/intel/cannonlake/include/soc/cnl_memcfg_init.h
2 files changed, 23 insertions(+), 10 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/31262/7

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