Jonathan Zhang uploaded patch set #3 to this change.
Add support for OCP platform TiogaPass
OCP platform Tiogapass is a 2 socket server platform based on
Intel Skylake-SP SOC. The chipset includes Lewisburg PCH.
Following ACPI tables are added:
DSDT/SSDT, MADT, FACP, FACS, HPET, MCFG, SLIT, SRAT, DMAR
This patchset was tested on a Tiogapass board. It booted with
Linux kernel 4.16.0; lscpu command shows all 72 cpus (2 sockets,
18 cores, 2 thread per core); ifconfig command shows
networking is up from Mellanox ConnectX-4 PCIe NIC card.
Known issues:
1. MP init does not work reliably, this causes reboot stability,
eg. some reboots does not boot up successfully.
2. c6 state is not supported.
3. "lspci -vvv" causes segmentation fault.
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Signed-off-by: Reddy Chagam <anjaneya.chagam@intel.com>
Change-Id: I29868f03037d1887b90dfb19d15aee83c456edce
---
A src/mainboard/ocp/Kconfig
A src/mainboard/ocp/Kconfig.name
A src/mainboard/ocp/tiogapass/Kconfig
A src/mainboard/ocp/tiogapass/Kconfig.name
A src/mainboard/ocp/tiogapass/Makefile.inc
A src/mainboard/ocp/tiogapass/acpi/platform.asl
A src/mainboard/ocp/tiogapass/acpi_tables.c
A src/mainboard/ocp/tiogapass/board_info.txt
A src/mainboard/ocp/tiogapass/boardid.c
A src/mainboard/ocp/tiogapass/devicetree.cb
A src/mainboard/ocp/tiogapass/dsdt.asl
A src/mainboard/ocp/tiogapass/emmc.h
A src/mainboard/ocp/tiogapass/fadt.c
A src/mainboard/ocp/tiogapass/ramstage.c
A src/mainboard/ocp/tiogapass/romstage.c
A src/mainboard/ocp/tiogapass/skxsp_tp_gpio.h
A src/mainboard/ocp/tiogapass/skxsp_tp_iio.h
A src/mainboard/ocp/tiogapass/tiogapass_boardid.h
A src/mainboard/ocp/tiogapass/vboot-ro.fmd
19 files changed, 1,321 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/38549/3
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