Subrata Banik has uploaded this change for review.

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soc/intel/icelake: Include path for FSP headers

This patch includes Icelake specific FSP headers for coreboot build.

Change-Id: I34ddf35740d44bd73adb877f194d3851c0d17acd
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
---
M src/soc/intel/icelake/Makefile.inc
1 file changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/29400/1

diff --git a/src/soc/intel/icelake/Makefile.inc b/src/soc/intel/icelake/Makefile.inc
index a81edd4..2a08401 100644
--- a/src/soc/intel/icelake/Makefile.inc
+++ b/src/soc/intel/icelake/Makefile.inc
@@ -74,6 +74,8 @@
 verstage-y += spi.c
 verstage-$(CONFIG_UART_DEBUG) += uart.c
 
+CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/icelake
+
 CPPFLAGS_common += -I$(src)/soc/intel/icelake
 CPPFLAGS_common += -I$(src)/soc/intel/icelake/include
 

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