Attention is currently required from: Andrey Pronin, Julius Werner, Aaron Durbin.
2 comments:
File src/security/vboot/secdata_tpm.c:
Patch Set #1, Line 243: rv = tlcl_define_space(FWMP_NV_INDEX, VB2_SECDATA_FWMP_MAX_SIZE,
vboot will be unhappy (later, in depthcharge) when it tries to read a FWMP space that exists but isn […]
My understanding was that it simply considers the space as missing since the read would be returning `TPM_E_BADINDEX`. But now going back, I think I might have been looking at the wrong tlcl code. (in coreboot vs depthcharge). Another option is to port that same behaviour to the tlcl code in depthchage.
File src/vendorcode/google/chromeos/Kconfig:
Patch Set #1, Line 95: config TPM20_CREATE_FWMP
Not sure why this should be a Kconfig? Don't we just want to do this unconditionally on all future d […]
(sorry, missed this comment earlier) I had the same question myself. :) I think it could work the same on Cr50 devices. I simply chose this way to minimize the changes to the other boards.
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