Attention is currently required from: Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson, Felix Held.
1 comment:
File src/mainboard/google/guybrush/variants/baseboard/devicetree.cb:
Patch Set #3, Line 55: i2c_pad_ctrl_rx_sel
Hrmm, it would have been nice to group this with the other i2c config: https://source.chromium. […]
I initially thought about adding it to soc_amd_common_i2c_config. Later I realized that this misc pad config applies only to picasso and cezanne. This register set does not exist in stoneyridge.
Also not sure about moving to dw_i2c_bus_config, since that is used in Intel platforms too and they configure the voltage level differently.
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