Aamir Bohra has uploaded this change for review.

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mb/intel/icelake_rvp: Configure USBC display HPD GPIOs

Change-Id: Ic76a6ac88de41b8cb5ff5c724e8ff9b9d7996a61
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
---
M src/mainboard/intel/icelake_rvp/variants/icl_u/gpio.c
M src/mainboard/intel/icelake_rvp/variants/icl_y/gpio.c
2 files changed, 16 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/31362/1

diff --git a/src/mainboard/intel/icelake_rvp/variants/icl_u/gpio.c b/src/mainboard/intel/icelake_rvp/variants/icl_u/gpio.c
index ea96cbc..9076b93 100644
--- a/src/mainboard/intel/icelake_rvp/variants/icl_u/gpio.c
+++ b/src/mainboard/intel/icelake_rvp/variants/icl_u/gpio.c
@@ -25,8 +25,14 @@
 PAD_CFG_GPI(GPP_A10, NONE, PLTRST),
 /* TCH_PNL2_RST_N */
 PAD_CFG_GPO(GPP_A13, 1, DEEP),
-/* ONBOARD_X4_PCIE_SLOT1_PWREN_N */
-PAD_CFG_GPO(GPP_A14, 0, DEEP),
+/* USB_C2_HPD */
+PAD_CFG_NF(GPP_A14, NONE, DEEP, NF2),
+/* USB_C3_HPD */
+PAD_CFG_NF(GPP_A15, NONE, DEEP, NF2),
+/* USB_C0_HPD */
+PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1),
+/* USB_C1_HPD */
+PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1),
 /* TCH_PNL2_INT_N */
 PAD_CFG_GPI_APIC_EDGE_LOW(GPP_B3, NONE, PLTRST),
 /* TC_RETIMER_FORCE_PWR */
diff --git a/src/mainboard/intel/icelake_rvp/variants/icl_y/gpio.c b/src/mainboard/intel/icelake_rvp/variants/icl_y/gpio.c
index ea96cbc..9076b93 100644
--- a/src/mainboard/intel/icelake_rvp/variants/icl_y/gpio.c
+++ b/src/mainboard/intel/icelake_rvp/variants/icl_y/gpio.c
@@ -25,8 +25,14 @@
 PAD_CFG_GPI(GPP_A10, NONE, PLTRST),
 /* TCH_PNL2_RST_N */
 PAD_CFG_GPO(GPP_A13, 1, DEEP),
-/* ONBOARD_X4_PCIE_SLOT1_PWREN_N */
-PAD_CFG_GPO(GPP_A14, 0, DEEP),
+/* USB_C2_HPD */
+PAD_CFG_NF(GPP_A14, NONE, DEEP, NF2),
+/* USB_C3_HPD */
+PAD_CFG_NF(GPP_A15, NONE, DEEP, NF2),
+/* USB_C0_HPD */
+PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1),
+/* USB_C1_HPD */
+PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1),
 /* TCH_PNL2_INT_N */
 PAD_CFG_GPI_APIC_EDGE_LOW(GPP_B3, NONE, PLTRST),
 /* TC_RETIMER_FORCE_PWR */

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