Angel Pons has uploaded this change for review.
cpu/intel/haswell/smmrelocate.c: Align with Broadwell
Change-Id: I8c2589141551028622a0ae1a183a74ebceb2acfb
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M src/cpu/intel/haswell/smmrelocate.c
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/42621/1
diff --git a/src/cpu/intel/haswell/smmrelocate.c b/src/cpu/intel/haswell/smmrelocate.c
index 0f7585a..5e4e028 100644
--- a/src/cpu/intel/haswell/smmrelocate.c
+++ b/src/cpu/intel/haswell/smmrelocate.c
@@ -111,7 +111,7 @@
msr_t mtrr_cap;
struct smm_relocation_params *relo_params = &smm_reloc_params;
- printk(BIOS_DEBUG, "In relocation handler: cpu %d\n", cpu);
+ printk(BIOS_DEBUG, "In relocation handler: CPU %d\n", cpu);
/* Determine if the processor supports saving state in MSRs. If so,
* enable it before the non-BSPs run so that SMM relocation can occur
@@ -284,6 +284,6 @@
* make the SMM registers writable again.
*/
printk(BIOS_DEBUG, "Locking SMM.\n");
- pci_write_config8(pcidev_on_root(0, 0), SMRAM,
+ pci_write_config8(pcidev_path_on_root(PCI_DEVFN(0, 0)), SMRAM,
D_LCK | G_SMRAME | C_BASE_SEG);
}
To view, visit change 42621. To unsubscribe, or for help writing mail filters, visit settings.