Attention is currently required from: Arthur Heymans, Felix Held, Jérémy Compostella, Nico Huber.

Felix Held uploaded patch set #2 to this change.

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The following approvals got outdated and were removed: Code-Review+1 by Nico Huber, Verified+1 by build bot (Jenkins)

arch/x86/ioapic: always write IOAPIC ID in set_ioapic_id

Back in the days of the APIC bus, the IOAPIC IDs mustn't overlap with
the LAPIC IDs (0 to CONFIG_MAX_CPUS - 1), but since the IOAPIC and LAPIC
nowadays talk to each other via the system bus, an IOAPIC ID of 0 is
valid. When set_ioapic_id gets called with an IOAPIC ID of 0, it skipped
writing the IOAPIC ID to the corresponding IOAPIC register, so the code
was relying of the register having the expected default value of the
IOAPIC IO 0 for things to work as expected. The case of the IOAPIC ID
being 0 is the most common case in coreboot, since that's what
register_new_ioapic_gsi0 will end up doing. Fix this issue by not making
the io_apic_write call conditional on ioapic_id being non-zero. The only
southbridge that doesn't call register_new_ioapic_gsi0, calls
set_ioapic_id with the IOAPIC ID 2 for which this won't cause any
changes in behavior.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ic8538f82a6b10f16eeb228669db197dc8e326ffd
---
M src/arch/x86/ioapic.c
1 file changed, 2 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/80330/2

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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ic8538f82a6b10f16eeb228669db197dc8e326ffd
Gerrit-Change-Number: 80330
Gerrit-PatchSet: 2
Gerrit-Owner: Felix Held <felix-coreboot@felixheld.de>
Gerrit-Reviewer: Arthur Heymans <arthur@aheymans.xyz>
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