Keith Hui has uploaded this change for review.
superio/nuvoton/*: Standardise config state entry/exit functions
Rename nuvoton_pnp_{enter,exit}_conf_state() to
pnp_{enter,exit}_conf_state() to match other Super I/Os.
Part of an attempt to standardise the pre-RAM API across all Super I/Os.
Change-Id: I238808b36545f3595a1b1a007ffe5dd41b448231
Signed-off-by: Keith Hui <buurin@gmail.com>
---
M src/mainboard/asrock/b75pro3-m/early_init.c
M src/mainboard/asrock/b85m_pro4/bootblock.c
M src/mainboard/asrock/g41c-gs/early_init.c
M src/mainboard/asrock/h81m-hds/bootblock.c
M src/mainboard/asus/h61m-cs/early_init.c
M src/mainboard/asus/p8h61-m_pro/early_init.c
M src/mainboard/asus/p8z77-m_pro/early_init.c
M src/mainboard/asus/p8z77-v_lx2/early_init.c
M src/mainboard/supermicro/x10slm-f/bootblock.c
M src/superio/nuvoton/common/early_serial.c
M src/superio/nuvoton/common/nuvoton.h
11 files changed, 22 insertions(+), 24 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/40963/1
diff --git a/src/mainboard/asrock/b75pro3-m/early_init.c b/src/mainboard/asrock/b75pro3-m/early_init.c
index 552e664..7a4a30c 100644
--- a/src/mainboard/asrock/b75pro3-m/early_init.c
+++ b/src/mainboard/asrock/b75pro3-m/early_init.c
@@ -30,14 +30,14 @@
void bootblock_mainboard_early_init(void)
{
/* Set GPIOs on superio, enable UART */
- nuvoton_pnp_enter_conf_state(SERIAL_DEV);
+ pnp_enter_conf_state(SERIAL_DEV);
pnp_set_logical_device(SERIAL_DEV);
pnp_write_config(SERIAL_DEV, 0x1c, 0x80);
pnp_write_config(SERIAL_DEV, 0x27, 0x80);
pnp_write_config(SERIAL_DEV, 0x2a, 0x60);
- nuvoton_pnp_exit_conf_state(SERIAL_DEV);
+ pnp_exit_conf_state(SERIAL_DEV);
nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
}
diff --git a/src/mainboard/asrock/b85m_pro4/bootblock.c b/src/mainboard/asrock/b85m_pro4/bootblock.c
index 5f91b29..2e72b22 100644
--- a/src/mainboard/asrock/b85m_pro4/bootblock.c
+++ b/src/mainboard/asrock/b85m_pro4/bootblock.c
@@ -12,7 +12,7 @@
void mainboard_config_superio(void)
{
- nuvoton_pnp_enter_conf_state(GLOBAL_DEV);
+ pnp_enter_conf_state(GLOBAL_DEV);
/* Select HWM/LED functions instead of floppy functions */
pnp_write_config(GLOBAL_DEV, 0x1c, 0x03);
@@ -22,7 +22,7 @@
pnp_set_logical_device(ACPI_DEV);
pnp_write_config(ACPI_DEV, 0xe4, 0x70);
- nuvoton_pnp_exit_conf_state(GLOBAL_DEV);
+ pnp_exit_conf_state(GLOBAL_DEV);
/* Enable UART */
nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
diff --git a/src/mainboard/asrock/g41c-gs/early_init.c b/src/mainboard/asrock/g41c-gs/early_init.c
index d35bb5d..209885a 100644
--- a/src/mainboard/asrock/g41c-gs/early_init.c
+++ b/src/mainboard/asrock/g41c-gs/early_init.c
@@ -29,14 +29,14 @@
{
/* Set GPIOs on superio, enable UART */
if (CONFIG(SUPERIO_NUVOTON_NCT6776)) {
- nuvoton_pnp_enter_conf_state(SERIAL_DEV_R2);
+ pnp_enter_conf_state(SERIAL_DEV_R2);
pnp_set_logical_device(SERIAL_DEV_R2);
pnp_write_config(SERIAL_DEV_R2, 0x1c, 0x80);
pnp_write_config(SERIAL_DEV_R2, 0x27, 0x80);
pnp_write_config(SERIAL_DEV_R2, 0x2a, 0x60);
- nuvoton_pnp_exit_conf_state(SERIAL_DEV_R2);
+ pnp_exit_conf_state(SERIAL_DEV_R2);
nuvoton_enable_serial(SERIAL_DEV_R2, CONFIG_TTYS0_BASE);
} else {
winbond_enable_serial(SERIAL_DEV_R1, CONFIG_TTYS0_BASE);
diff --git a/src/mainboard/asrock/h81m-hds/bootblock.c b/src/mainboard/asrock/h81m-hds/bootblock.c
index f3fb2c2..f5bbf6f 100644
--- a/src/mainboard/asrock/h81m-hds/bootblock.c
+++ b/src/mainboard/asrock/h81m-hds/bootblock.c
@@ -15,7 +15,7 @@
nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- nuvoton_pnp_enter_conf_state(GLOBAL_PSEUDO_DEV);
+ pnp_enter_conf_state(GLOBAL_PSEUDO_DEV);
/* Select HWM/LED functions instead of floppy functions. */
pnp_write_config(GLOBAL_PSEUDO_DEV, 0x1c, 0x03);
@@ -32,5 +32,5 @@
pnp_set_logical_device(IR_DEV);
pnp_write_config(IR_DEV, 0xf1, 0x5c);
- nuvoton_pnp_exit_conf_state(GLOBAL_PSEUDO_DEV);
+ pnp_exit_conf_state(GLOBAL_PSEUDO_DEV);
}
diff --git a/src/mainboard/asus/h61m-cs/early_init.c b/src/mainboard/asus/h61m-cs/early_init.c
index 1b9adb4..45459a4 100644
--- a/src/mainboard/asus/h61m-cs/early_init.c
+++ b/src/mainboard/asus/h61m-cs/early_init.c
@@ -32,10 +32,10 @@
void bootblock_mainboard_early_init(void)
{
- nuvoton_pnp_enter_conf_state(SIO_DEV);
+ pnp_enter_conf_state(SIO_DEV);
pnp_set_logical_device(ACPI_DEV);
pnp_write_config(ACPI_DEV, 0xe4, 0x10);
- nuvoton_pnp_exit_conf_state(SIO_DEV);
+ pnp_exit_conf_state(SIO_DEV);
}
void mainboard_get_spd(spd_raw_data *spd, bool id_only)
diff --git a/src/mainboard/asus/p8h61-m_pro/early_init.c b/src/mainboard/asus/p8h61-m_pro/early_init.c
index 582366d..f6eb812 100644
--- a/src/mainboard/asus/p8h61-m_pro/early_init.c
+++ b/src/mainboard/asus/p8h61-m_pro/early_init.c
@@ -33,7 +33,7 @@
void bootblock_mainboard_early_init(void)
{
/* Enable UART */
- nuvoton_pnp_enter_conf_state(GLOBAL_DEV);
+ pnp_enter_conf_state(GLOBAL_DEV);
/* Select SIO pin states. */
pnp_write_config(GLOBAL_DEV, 0x1c, 0x83);
@@ -47,7 +47,7 @@
pnp_set_logical_device(SERIAL_DEV);
- nuvoton_pnp_exit_conf_state(GLOBAL_DEV);
+ pnp_exit_conf_state(GLOBAL_DEV);
nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
}
diff --git a/src/mainboard/asus/p8z77-m_pro/early_init.c b/src/mainboard/asus/p8z77-m_pro/early_init.c
index 687cbfd..eb0df1c 100644
--- a/src/mainboard/asus/p8z77-m_pro/early_init.c
+++ b/src/mainboard/asus/p8z77-m_pro/early_init.c
@@ -38,12 +38,12 @@
void bootblock_mainboard_early_init(void)
{
/* Setup COM/UART */
- nuvoton_pnp_enter_conf_state(GLOBAL_DEV);
+ pnp_enter_conf_state(GLOBAL_DEV);
/* TODO / FIXME: Setup Multifuncion/SIO pins for COM */
pnp_set_logical_device(SERIAL_DEV);
- nuvoton_pnp_exit_conf_state(GLOBAL_DEV);
+ pnp_exit_conf_state(GLOBAL_DEV);
nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
}
diff --git a/src/mainboard/asus/p8z77-v_lx2/early_init.c b/src/mainboard/asus/p8z77-v_lx2/early_init.c
index cbbf9dc..5a7b4cb 100644
--- a/src/mainboard/asus/p8z77-v_lx2/early_init.c
+++ b/src/mainboard/asus/p8z77-v_lx2/early_init.c
@@ -32,7 +32,7 @@
void bootblock_mainboard_early_init(void)
{
- nuvoton_pnp_enter_conf_state(GLOBAL_DEV);
+ pnp_enter_conf_state(GLOBAL_DEV);
/* Select SIO pin states */
pnp_write_config(GLOBAL_DEV, 0x1a, 0x02);
@@ -47,7 +47,7 @@
pnp_set_logical_device(ACPI_DEV);
pnp_write_config(ACPI_DEV, 0xe4, 0x10);
- nuvoton_pnp_exit_conf_state(GLOBAL_DEV);
+ pnp_exit_conf_state(GLOBAL_DEV);
/* Enable UART */
nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
diff --git a/src/mainboard/supermicro/x10slm-f/bootblock.c b/src/mainboard/supermicro/x10slm-f/bootblock.c
index c0d4502..64b5e6d 100644
--- a/src/mainboard/supermicro/x10slm-f/bootblock.c
+++ b/src/mainboard/supermicro/x10slm-f/bootblock.c
@@ -26,7 +26,7 @@
nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- nuvoton_pnp_enter_conf_state(GLOBAL_PSEUDO_DEV);
+ pnp_enter_conf_state(GLOBAL_PSEUDO_DEV);
/* Select HWM/LED functions instead of floppy functions. */
pnp_write_config(GLOBAL_PSEUDO_DEV, 0x1c, 0x03);
@@ -36,5 +36,5 @@
pnp_set_logical_device(ACPI_DEV);
pnp_write_config(ACPI_DEV, 0xe4, 0x70);
- nuvoton_pnp_exit_conf_state(GLOBAL_PSEUDO_DEV);
+ pnp_exit_conf_state(GLOBAL_PSEUDO_DEV);
}
diff --git a/src/superio/nuvoton/common/early_serial.c b/src/superio/nuvoton/common/early_serial.c
index ed31b72..b709969 100644
--- a/src/superio/nuvoton/common/early_serial.c
+++ b/src/superio/nuvoton/common/early_serial.c
@@ -31,7 +31,7 @@
/* Enable configuration: pass entry key '0x87' into index port dev
* two times. */
-void nuvoton_pnp_enter_conf_state(pnp_devfn_t dev)
+void pnp_enter_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(NUVOTON_ENTRY_KEY, port);
@@ -39,7 +39,7 @@
}
/* Disable configuration: pass exit key '0xAA' into index port dev. */
-void nuvoton_pnp_exit_conf_state(pnp_devfn_t dev)
+void pnp_exit_conf_state(pnp_devfn_t dev)
{
u16 port = dev >> 8;
outb(NUVOTON_EXIT_KEY, port);
@@ -48,7 +48,7 @@
/* Bring up early serial debugging output before the RAM is initialized. */
void nuvoton_enable_serial(pnp_devfn_t dev, u16 iobase)
{
- nuvoton_pnp_enter_conf_state(dev);
+ pnp_enter_conf_state(dev);
if (CONFIG(SUPERIO_NUVOTON_NCT5539D_COM_A))
/* Route COM A to GPIO8 pin group */
@@ -66,5 +66,5 @@
pnp_set_enable(dev, 0);
pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
pnp_set_enable(dev, 1);
- nuvoton_pnp_exit_conf_state(dev);
+ pnp_exit_conf_state(dev);
}
diff --git a/src/superio/nuvoton/common/nuvoton.h b/src/superio/nuvoton/common/nuvoton.h
index f5b3176..d69548e 100644
--- a/src/superio/nuvoton/common/nuvoton.h
+++ b/src/superio/nuvoton/common/nuvoton.h
@@ -7,8 +7,6 @@
#include <device/pnp_type.h>
#include <stdint.h>
-void nuvoton_pnp_enter_conf_state(pnp_devfn_t dev);
-void nuvoton_pnp_exit_conf_state(pnp_devfn_t dev);
void nuvoton_enable_serial(pnp_devfn_t dev, u16 iobase);
#endif /* SUPERIO_NUVOTON_COMMON_PRE_RAM_H */
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