Patch set 62:Code-Review +1
13 comments:
File src/mainboard/acer/aspire_vn7_572g/Kconfig:
Patch Set #62, Line 55: #config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
Why? I didn't want to enable too much at once, but isn't it good to inform the OS of the hardware, s […]
This symbol isn't used anywhere: https://github.com/coreboot/coreboot/search?q=MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
I know, it was used before, but it's now gone. Refer to the seven commits on GitHub search results
File src/mainboard/acer/aspire_vn7_572g/acpi/ec.asl:
Patch Set #62, Line 155: Method (_Q1C, 0, NotSerialized) // _Qxx: EC Query, xx=0x00-0xFF
At the moment, I can hazard guesses based on which device is notified and by corroborating the value […]
Well, you can apply ACPI overrides even when using the vendor BIOS: https://wiki.archlinux.org/index.php/DSDT
I used that to track down how special keys work on a Sony laptop.
File src/mainboard/acer/aspire_vn7_572g/devicetree.cb:
This one should be enabled in order to use a SATA SSD.
Shouldn't this be 3 for SATA3 6Gbps speeds?
Patch Set #62, Line 107: #| AC LoadLine | 10.3 mOhm | 2.4 mOhm | 3.1 mOhm | 3.1 mOhm |
6th Generation Intel Processor for U/Y-Platforms Datasheet, Volume 1 of 2 (#332990)
Ack, thanks
Patch Set #62, Line 202: register "usb2_ports[4]" = "USB2_PORT_FLEX(OC_SKIP)" # Bluetooth
Missing `usb2_ports[5]` for the touch screen? (likely unused)
Patch Set #62, Line 204: register "usb2_ports[7]" = "USB2_PORT_FLEX(OC_SKIP)" # SD
Also missing `usb2_ports[8]` for the "finger printer"
Patch Set #62, Line 208: # register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C Port
This and `usb3_ports[3]` seem to be used for USB Type-C
Patch Set #62, Line 232: [PchSerialIoIndexUart2] = PchSerialIoDisabled,
This could be enabled as a debug port. Maybe "SkipInit" ?
Patch Set #62, Line 240: device pci 01.0 on end # Dedicated Graphics Device
I don't think SKL-U has such device. This is the PEG port on the SA (System Agent), and it is not present on U nor Y series chips.
Patch Set #62, Line 253: device pci 1c.0 on end # PCI Express Port 1
This is actually the dGPU root port. Would be nice to add a comment
File src/mainboard/acer/aspire_vn7_572g/gma-mainboard.ads:
Not used, the DP AUX channel is not available over HDMI (for obvious reasons)
File src/mainboard/acer/aspire_vn7_572g/ramstage.c:
Patch Set #62, Line 34: system76
It is fairly generic code and I have modified it, mostly according to the schematics and what I've s […]
Ack. I would update the prints however
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