Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41869 )
Change subject: amd/microcode: Change equivalant ID width to 16bit
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Patch Set 3: Code-Review+2
Here MPB_BIOS_REVISION has the same offset as equivalent processor ID. But this field combines the
equivalent processor ID, Chipset1 RevisionID and Chipset2 RevisionID.
The AGESA source code also compares the 16bit data to decide if the patch is going to be loaded.
Ok, that explains things. The reference code does indeed only use 16 bit for this field; only looked at the PPR before. I wonder why the documentation combines these 3 fields into one 32 bit one though.
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