4 comments:
File src/soc/intel/common/block/itss/irq.c:
Patch Set #13, Line 32: LPSS controllers need to be assigned unique IRQs
What I was referring to is: […]
yes.
Can you please add a debug dump function that prints out the configuration for all devices? And atta […]
Ok. Below is the current IRQ config that gets passed for hatch:
Interrupt assignment:
Dxx:Fx INTx IRQ
D18:F0 1 016
D20:F0 1 016
D20:F3 2 017
D20:F5 3 018
D21:F0 1 016
D21:F1 2 017
D21:F3 3 018
D22:F0 1 016
D23:F0 1 016
D25:F0 4 019
D29:F0 1 016
D29:F5 2 017
D30:F0 1 020
D30:F2 2 021
D30:F3 3 022
D31:F3 1 016
D31:F4 2 017
Patch Set #13, Line 47: slot != PCI_SLOT(dev->path.pci.devfn)
> Is there even any guarantee that the devicetree provides the devices "in order" ? I could arbitra […]
OK Updated the implementation to scan from min to max devfn.
Patch Set #13, Line 99: index++;
Yes, you have SoC maintain the buffer. […]
Ok, I tried moving the buffer to common, But then the contents from the buffer pointer runs null in the SOC and if I pass the same to FSP all IRQs are programmed to 0.
I checked the pointer through print the address it same(points to buffer), but then content runs all zeros in SOC. I'll check further on this.
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