Patch Set 4:
Hello Mathew,
usually I'm asked to write documentation, but now I'm
the one that actually misses some information. I know
it is common for chromium firmware to have rendundant
FMAP entries for the descriptor regions. But, AFAICS,
this is nowhere documented. Especially the reason for
these entries would be nice to know, as coreboot it-
self doesn't care about them. Oh, and what does the
SI prefix stand for?
Nico, what are you requesting exactly? I'm not entirely sure, but it sounds like you are assuming coreboot shouldn't care about other regions covered by the descriptor. As system builders we definitely care about managing all regions/assets that comprise the spi flash. That may not be true for all users of coreboot, but it's definitely true for Chrome OS.
As for SI prefix, I actually don't know. Silicon Initialization? That sounds like an intel term enough that it might be that. I never bothered to look up where that came from. Perhaps Duncan remembers?
Without such documentation, a validation option can
be confusing. For instance, if I were told to imple-
ment such an option in ifdtool, I would rather check
that all FMAP regions are within the IFD BIOS region,
because I wouldn't expect redundancy.
That's assuming one only cares about the BIOS region. And the check is that things are hierarchical within those regions w/o overlaps. If you care about covering every region then those same checks would apply to other regions covered in the descriptor.
To view, visit change 34802. To unsubscribe, or for help writing mail filters, visit settings.