Lean Sheng Tan has uploaded this change for review.
mb/intel/ehlcrb: Update ehl_crb device tree
Update Elkhartlake CRB devicetree devices based on EHL EDS.
Signed-off-by: Tan, Lean Sheng <lean.sheng.tan@intel.com>
Change-Id: I88097ced03f4376f309487b9d5207473f77742ef
---
M src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb
1 file changed, 99 insertions(+), 185 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/48124/1
diff --git a/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb b/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb
index de4dcbe..51f9979 100644
--- a/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb
+++ b/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb
@@ -7,192 +7,106 @@
device domain 0 on
device pci 00.0 on end # Host Bridge
device pci 02.0 on end # Integrated Graphics Device
- device pci 04.0 on
- chip drivers/intel/dptf
- register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 95, 1000)"
- register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 119, SHUTDOWN)"
+ device pci 04.0 off end # SA Thermal device
+ device pci 08.0 off end # GNA
+ device pci 09.0 off end # CPU Intel Trace Hub
- register "controls.power_limits.pl1" = "{
- .min_power = 3000,
- .max_power = 6000,
- .time_window_min = 1 * MSECS_PER_SEC,
- .time_window_max = 1 * MSECS_PER_SEC,
- .granularity = 200,}"
- register "controls.power_limits.pl2" = "{
- .min_power = 20000,
- .max_power = 20000,
- .time_window_min = 1 * MSECS_PER_SEC,
- .time_window_max = 1 * MSECS_PER_SEC,
- .granularity = 1000,}"
- device generic 0 on end
- end
- end # SA Thermal device
+ device pci 10.0 on end # I2C6
+ device pci 10.1 on end # I2C7
+ device pci 10.5 on end # Integrated Error Handler
- device pci 05.0 on end
- device pci 12.0 off end # Thermal Subsystem
- device pci 12.5 off end # UFS SCS
- device pci 12.6 off end # GSPI #2
- device pci 14.0 on
- chip drivers/usb/acpi
- register "desc" = ""Root Hub""
- register "type" = "UPC_TYPE_HUB"
- device usb 0.0 on
- chip drivers/usb/acpi
- register "desc" = ""USB3/2 Type-A Left Lower""
- register "type" = "UPC_TYPE_A"
- device usb 2.0 on end
- end
- chip drivers/usb/acpi
- register "desc" = ""WWAN""
- register "type" = "UPC_TYPE_INTERNAL"
- device usb 2.1 on end
- end
- chip drivers/usb/acpi
- register "desc" = ""Bluetooth""
- register "type" = "UPC_TYPE_INTERNAL"
- device usb 2.2 on end
- end
- chip drivers/usb/acpi
- register "desc" = ""USB C Connector 1""
- register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- device usb 2.3 on end
- end
- chip drivers/usb/acpi
- register "desc" = ""USB C Connector 2""
- register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- device usb 2.4 on end
- end
- chip drivers/usb/acpi
- register "desc" = ""USB C Connector 3""
- register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- device usb 2.5 on end
- end
- chip drivers/usb/acpi
- register "desc" = ""USB C Connector 4""
- register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
- device usb 2.6 on end
- end
- chip drivers/usb/acpi
- register "desc" = ""USB3/2 Type-A Left Upper""
- register "type" = "UPC_TYPE_A"
- device usb 2.7 on end
- end
- chip drivers/usb/acpi
- register "desc" = ""USB3/2 Type-A Left Lower""
- register "type" = "UPC_TYPE_A"
- device usb 3.0 on end
- end
- chip drivers/usb/acpi
- register "desc" = ""USB3/2 Type-A Left Upper""
- register "type" = "UPC_TYPE_A"
- device usb 3.1 on end
- end
- chip drivers/usb/acpi
- register "desc" = ""WLAN""
- register "type" = "UPC_TYPE_INTERNAL"
- device usb 3.2 on end
- end
- chip drivers/usb/acpi
- register "desc" = ""USB3 Port Unused1""
- register "type" = "UPC_TYPE_INTERNAL"
- device usb 3.3 on end
- end
- chip drivers/usb/acpi
- register "desc" = ""USB3 Port Unused2""
- register "type" = "UPC_TYPE_INTERNAL"
- device usb 3.4 on end
- end
- chip drivers/usb/acpi
- register "desc" = ""USB3 Port Unused3""
- register "type" = "UPC_TYPE_INTERNAL"
- device usb 3.5 on end
- end
- end
- end
- end # USB xHCI
- device pci 14.1 off end # USB xDCI (OTG)
- device pci 14.2 off end # PMC SRAM
- device pci 14.3 on
- chip drivers/wifi/generic
- register "wake" = "GPE0_PME_B0"
- device generic 0 on end
- end
- end # CNVi wifi
- device pci 14.5 on end # SDCard
- device pci 15.0 on
- chip drivers/i2c/max98373
- register "vmon_slot_no" = "4"
- register "imon_slot_no" = "5"
- register "uid" = "0"
- register "desc" = ""RIGHT SPEAKER AMP""
- register "name" = ""MAXR""
- device i2c 31 on end
- end
- chip drivers/i2c/max98373
- register "vmon_slot_no" = "6"
- register "imon_slot_no" = "7"
- register "uid" = "1"
- register "desc" = ""LEFT SPEAKER AMP""
- register "name" = ""MAXL""
- device i2c 32 on end
- end
- chip drivers/i2c/da7219
- register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_H16_IRQ)"
- register "btn_cfg" = "50"
- register "mic_det_thr" = "500"
- register "jack_ins_deb" = "20"
- register "jack_det_rate" = ""32ms_64ms""
- register "jack_rem_deb" = "1"
- register "a_d_btn_thr" = "0xa"
- register "d_b_btn_thr" = "0x16"
- register "b_c_btn_thr" = "0x21"
- register "c_mic_btn_thr" = "0x3e"
- register "btn_avg" = "4"
- register "adc_1bit_rpt" = "1"
- register "micbias_lvl" = "2600"
- register "mic_amp_in_sel" = ""diff""
- device i2c 1a on end
- end
- end # I2C #0 Audio
- device pci 15.1 off end # I2C #1
- device pci 15.2 off end # I2C #2
- device pci 15.3 off end # I2C #3
- device pci 16.0 on end # Management Engine Interface 1
- device pci 16.1 off end # Management Engine Interface 2
- device pci 16.2 off end # Management Engine IDE-R
- device pci 16.3 off end # Management Engine KT Redirection
- device pci 16.4 off end # Management Engine Interface 3
- device pci 16.5 off end # Management Engine Interface 4
- device pci 17.0 off end # SATA
- device pci 19.0 on end # I2C
- device pci 19.1 on end # I2C
- device pci 19.2 on end # UART #2
- device pci 1a.0 on end # eMMC
- device pci 1c.0 off end # PCI Express Port 1
- device pci 1c.1 on end # PCI Express Port 2 - WLAN
- device pci 1c.2 off end # PCI Express Port 3
- device pci 1c.3 off end # PCI Express Port 4
- device pci 1c.4 on end # PCI Express Port 5 - NVMe
- device pci 1c.5 off end # PCI Express Port 6
- device pci 1c.6 off end # PCI Express Port 7
- device pci 1c.7 off end # PCI Express Port 8
- device pci 1e.0 on end # UART #0
- device pci 1e.1 off end # UART #1
- device pci 1e.2 off end # GSPI #0
- device pci 1e.3 on
- chip drivers/spi/acpi
- register "hid" = "ACPI_DT_NAMESPACE_HID"
- register "compat_string" = ""google,cr50""
- register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_H13_IRQ)"
- device spi 0 on end
- end
- end # GSPI #1
- device pci 1f.0 on end # eSPI Interface
- device pci 1f.1 on end # P2SB
- device pci 1f.2 hidden end # Power Management Controller
- device pci 1f.3 on end # Intel HDA
- device pci 1f.4 on end # SMBus
- device pci 1f.5 on end # PCH SPI
- device pci 1f.6 off end # GbE
+ device pci 11.0 off end # Intel Programmable Services Engine UART0
+ device pci 11.1 off end # Intel Programmable Services Engine UART1
+ device pci 11.2 off end # Intel Programmable Services Engine UART2
+ device pci 11.3 off end # Intel Programmable Services Engine UART3
+ device pci 11.4 off end # Intel Programmable Services Engine UART4
+ device pci 11.5 off end # Intel Programmable Services Engine UART5
+ device pci 11.6 off end # Intel Programmable Services Engine IS20
+ device pci 11.7 off end # Intel Programmable Services Engine IS21
+
+ device pci 12.0 on end # GSPI2
+ device pci 12.3 on end # Management Engine UMA Access
+ device pci 12.4 on end # Management Engine PTT DMA Controller
+ device pci 12.5 off end # UFS0
+ device pci 12.7 off end # UFS1
+
+ device pci 13.0 off end # Intel Programmable Services Engine GSPI0
+ device pci 13.1 off end # Intel Programmable Services Engine GSPI1
+ device pci 13.2 off end # Intel Programmable Services Engine GSPI2
+ device pci 13.3 off end # Intel Programmable Services Engine GSPI3
+ device pci 13.4 off end # Intel Programmable Services Engine GPIO0
+ device pci 13.5 off end # Intel Programmable Services Engine GPIO1
+
+ device pci 14.0 on end # USB3.1 xHCI
+ device pci 14.1 off end # USB3.1 xDCI (OTG)
+
+ device pci 15.0 on end # I2C0
+ device pci 15.1 on end # I2C1
+ device pci 15.2 on end # I2C2
+ device pci 15.3 on end # I2C3
+
+ device pci 16.0 on end # Management Engine Interface 1
+ device pci 16.1 on end # Management Engine Interface 2
+ device pci 16.4 on end # Management Engine Interface 3
+ device pci 16.5 on end # Management Engine Interface 4
+
+ device pci 17.0 on end # SATA
+
+ device pci 18.0 off end # Intel Programmable Services Engine I2C7
+ device pci 18.1 off end # Intel Programmable Services Engine CAN0
+ device pci 18.2 off end # Intel Programmable Services Engine CAN1
+ device pci 18.3 off end # Intel Programmable Services Engine QEP0
+ device pci 18.4 off end # Intel Programmable Services Engine QEP1
+ device pci 18.5 off end # Intel Programmable Services Engine QEP2
+ device pci 18.6 off end # Intel Programmable Services Engine QEP3
+
+ device pci 19.0 on end # I2C4
+ device pci 19.1 on end # I2C5
+ device pci 19.2 on end # UART2
+
+ device pci 1a.0 on end # eMMC
+ device pci 1a.1 off end # SD
+ device pci 1a.3 off end # Intel Safety Island
+
+ device pci 1b.0 off end # Intel Programmable Services Engine I2C0
+ device pci 1b.1 off end # Intel Programmable Services Engine I2C1
+ device pci 1b.2 off end # Intel Programmable Services Engine I2C2
+ device pci 1b.3 off end # Intel Programmable Services Engine I2C3
+ device pci 1b.4 off end # Intel Programmable Services Engine I2C4
+ device pci 1b.5 off end # Intel Programmable Services Engine I2C5
+ device pci 1b.6 off end # Intel Programmable Services Engine I2C6
+
+ device pci 1c.0 on end # RP1 (pcie0 single VC)
+ device pci 1c.1 on end # RP2 (pcie0 single VC)
+ device pci 1c.2 on end # RP3 (pcie0 single VC)
+ device pci 1c.3 on end # RP4 (pcie0 single VC)
+ device pci 1c.4 on end # RP5 (pcie1 multi VC)
+ device pci 1c.5 on end # RP6 (pcie2 multi VC)
+ device pci 1c.6 on end # RP7 (pcie3 multi VC)
+
+ device pci 1d.0 off end # Intel Programmable Services Engine IPC (local host to PSE)
+ device pci 1d.1 on end # Intel Programmable Services Engine Time-Sensitive Networking GbE 0
+ device pci 1d.2 on end # Intel Programmable Services Engine Time-Sensitive Networking GbE 1
+ device pci 1d.3 off end # Intel Programmable Services Engine DMA0
+ device pci 1d.4 off end # Intel Programmable Services Engine DMA1
+ device pci 1d.5 off end # Intel Programmable Services Engine DMA2
+ device pci 1d.6 off end # Intel Programmable Services Engine PWM
+ device pci 1d.7 off end # Intel Programmable Services Engine ADC
+
+ device pci 1e.0 on end # UART0
+ device pci 1e.1 on end # UART1
+ device pci 1e.2 on end # GSPI0
+ device pci 1e.3 on end # GSPI1
+ device pci 1e.4 on end # PCH Time-Sensitive Networking GbE
+ device pci 1e.6 on end # HPET
+ device pci 1e.7 on end # IOAPIC
+
+ device pci 1f.0 on end # eSPI Interface
+ device pci 1f.1 on end # P2SB
+ device pci 1f.2 hidden end # Power Management Controller
+ device pci 1f.3 off end # Intel cAVS/HDA
+ device pci 1f.4 on end # SMBus
+ device pci 1f.5 on end # PCH SPI (flash & TPM)
+ device pci 1f.7 off end # PCH Intel Trace Hub
end
end
To view, visit change 48124. To unsubscribe, or for help writing mail filters, visit settings.