[coreboot-gerrit] Change in coreboot[master]: mb/*/*: Don't select PCIEXP_HOTPLUG

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/51151 )

Change subject: mb/*/*: Don't select PCIEXP_HOTPLUG
......................................................................

mb/*/*: Don't select PCIEXP_HOTPLUG

PCIEXP_HOTPLUG has a prompt and as such is not supposed to be forced.
Just change the default value to 'y'.

Change-Id: Ie4248700f5ab5168bff551b740d347713273763c
Signed-off-by: Arthur Heymans 
---
M src/mainboard/google/volteer/Kconfig
M src/mainboard/intel/adlrvp/Kconfig
M src/mainboard/intel/tglrvp/Kconfig
3 files changed, 9 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/51151/1

diff --git a/src/mainboard/google/volteer/Kconfig b/src/mainboard/google/volteer/Kconfig
index ddfd704..79f50aa 100644
--- a/src/mainboard/google/volteer/Kconfig
+++ b/src/mainboard/google/volteer/Kconfig
@@ -30,7 +30,6 @@
    select MAINBOARD_HAS_SPI_TPM_CR50 if !BOARD_GOOGLE_VOLTEER2_TI50
    select MAINBOARD_HAS_I2C_TPM_CR50 if BOARD_GOOGLE_VOLTEER2_TI50
    select MAINBOARD_HAS_TPM2
-	select PCIEXP_HOTPLUG
    select SOC_INTEL_CSE_LITE_SKU
    select SOC_INTEL_TIGERLAKE
    select HAVE_SPD_IN_CBFS
@@ -112,6 +111,9 @@
    int
    default 8

+config PCIEXP_HOTPLUG
+	default y
+
 # Reserving resources for PCIe Hotplug as per TGL BIOS Spec (doc #611569)
 # Revision 0.7.6 Section 7.2.5.1.5
 config PCIEXP_HOTPLUG_BUSES
diff --git a/src/mainboard/intel/adlrvp/Kconfig b/src/mainboard/intel/adlrvp/Kconfig
index 91a18d9..295b56f 100644
--- a/src/mainboard/intel/adlrvp/Kconfig
+++ b/src/mainboard/intel/adlrvp/Kconfig
@@ -16,7 +16,6 @@
    select SOC_INTEL_ALDERLAKE_PCH_M if BOARD_INTEL_ADLRVP_M || BOARD_INTEL_ADLRVP_M_EXT_EC
    select HAVE_SPD_IN_CBFS
    select DRIVERS_SOUNDWIRE_ALC711
-	select PCIEXP_HOTPLUG

config CHROMEOS
    select GBB_FLAG_FORCE_DEV_SWITCH_ON
@@ -85,6 +84,9 @@
    select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC if VBOOT
 endchoice

+config PCIEXP_HOTPLUG
+	default y
+
 config PCIEXP_HOTPLUG_BUSES
    int
    default 42
diff --git a/src/mainboard/intel/tglrvp/Kconfig b/src/mainboard/intel/tglrvp/Kconfig
index 233706d..bbdaf79 100644
--- a/src/mainboard/intel/tglrvp/Kconfig
+++ b/src/mainboard/intel/tglrvp/Kconfig
@@ -18,7 +18,6 @@
    select INTEL_LPSS_UART_FOR_CONSOLE
    select DRIVERS_INTEL_ISH
    select EC_ACPI
-	select PCIEXP_HOTPLUG
    select HAVE_SPD_IN_CBFS
    select SOC_INTEL_CSE_LITE_SKU
    select MAINBOARD_HAS_TPM2
@@ -61,6 +60,9 @@
    int
    default 8

+config PCIEXP_HOTPLUG
+	default y
+
 config PCIEXP_HOTPLUG_BUSES
    int
    default 42