Patrick Rudolph merged this change.

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Approvals: build bot (Jenkins): Verified Patrick Rudolph: Looks good to me, approved Patrick Rudolph: Looks good to me, but someone else must approve Philipp Hug: Looks good to me, approved
riscv: use mret to invoke M-mode payload and disable interrupts

Fixes a logic error that sets MPIE, but didn't use mret to return to the payload.
This left MIE set to an undefined value.

Now all modes are handled the same way:
- Trap vector base address point to the payload
- Disable Interrupt
- Return to payload using mret

TEST=Run an M-mode payload

Change-Id: Iaab595f916949c57104ec00f8b06ea047fe76bba
Signed-off-by: Xiang Wang <wxjstz@126.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33462
Reviewed-by: Philipp Hug <philipp@hug.cx>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
M src/arch/riscv/payload.c
1 file changed, 20 insertions(+), 5 deletions(-)

diff --git a/src/arch/riscv/payload.c b/src/arch/riscv/payload.c
index f3ed5a4..903e8a6 100644
--- a/src/arch/riscv/payload.c
+++ b/src/arch/riscv/payload.c
@@ -19,23 +19,38 @@
#include <arch/boot.h>
#include <arch/encoding.h>
#include <console/console.h>
+#include <vm.h>

void run_payload(struct prog *prog, void *fdt, int payload_mode)
{
void (*doit)(int hart_id, void *fdt) = prog_entry(prog);
int hart_id = read_csr(mhartid);
uintptr_t status = read_csr(mstatus);
- status &= ~MSTATUS_MPIE;
- status &= ~MSTATUS_MPP;
+ status = INSERT_FIELD(status, MSTATUS_MPIE, 0);
switch (payload_mode) {
case RISCV_PAYLOAD_MODE_U:
+ status = INSERT_FIELD(status, MSTATUS_MPP, PRV_U);
+ /* Trap vector base address point to the payload */
+ write_csr(utvec, doit);
+ /* disable U-Mode interrupt */
+ write_csr(uie, 0);
break;
case RISCV_PAYLOAD_MODE_S:
- status |= MSTATUS_SPP;
+ status = INSERT_FIELD(status, MSTATUS_MPP, PRV_S);
+ /* Trap vector base address point to the payload */
+ write_csr(stvec, doit);
+ /* disable S-Mode interrupt */
+ write_csr(sie, 0);
+ /* disable MMU */
+ write_csr(satp, 0);
break;
case RISCV_PAYLOAD_MODE_M:
- doit(hart_id, fdt);
- return;
+ status = INSERT_FIELD(status, MSTATUS_MPP, PRV_M);
+ /* Trap vector base address point to the payload */
+ write_csr(mtvec, doit);
+ /* disable M-Mode interrupt */
+ write_csr(mie, 0);
+ break;
default:
die("wrong privilege level for payload");
break;

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Iaab595f916949c57104ec00f8b06ea047fe76bba
Gerrit-Change-Number: 33462
Gerrit-PatchSet: 4
Gerrit-Owner: Xiang Wang <wxjstz@126.com>
Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph@9elements.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: Philipp Hug <philipp@hug.cx>
Gerrit-Reviewer: Xiang Wang <wxjstz@126.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-CC: Shawn C <citypw@gmail.com>
Gerrit-CC: ron minnich <rminnich@gmail.com>
Gerrit-MessageType: merged