huayang duan has uploaded this change for review.

View Change

google/kukui: force run dram full-k blob

Force load dram.bin and run it for full dram calibration.

BUG=b:134351649
BRANCH=none
TEST=emerge-kukui coreboot

Change-Id: I8de29b14b1fb24b3b4f351c855c5c4d8f350cc34
Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
---
M src/mainboard/google/kukui/romstage.c
1 file changed, 53 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/35110/1

diff --git a/src/mainboard/google/kukui/romstage.c b/src/mainboard/google/kukui/romstage.c
index 131d167..f3774a1 100644
--- a/src/mainboard/google/kukui/romstage.c
+++ b/src/mainboard/google/kukui/romstage.c
@@ -14,6 +14,7 @@
  */
 
 #include <arch/stages.h>
+#include <assert.h>
 #include <soc/emi.h>
 #include <soc/mmu_operations.h>
 #include <soc/mt6358.h>
@@ -33,7 +34,7 @@
 	int (*dram_init)(void *param);
 	size_t blob_size, region_size;
 
-	region_size = _edram_init_code - _dram_init_code;
+	region_size = REGION_SIZE(dram_init_code);
 	blob_size = cbfs_boot_load_file("dram.bin", _dram_init_code,
 					region_size, CBFS_TYPE_RAW);
 	if (blob_size == 0) {
@@ -42,18 +43,43 @@
 	}
 
 	dram_init = (int (*)(void *))_dram_init_code;
+	printk(BIOS_ERR, "dram.bin after _dram_init_code\n");
 
 	return dram_init(NULL);
 }
 
+static const struct sdram_params *get_full_k_param(void)
+{
+	const struct sdram_params *params = NULL;
+
+	//load params from flash(the params generated by full-k blob)
+	//TODO
+	//params = read_params_from_flash()
+	params = get_sdram_config();
+
+	return  params;
+}
+
+static bool  force_full_k_dram = true;
 static void dram_initialize(void)
 {
-	int err = dram_blob_load_and_run();
-	if (err == 0)
-		return;
+	const struct sdram_params *params = NULL;
 
-	printk(BIOS_ERR, "dram_blob error:%d\n", err);
-	mt_mem_init(get_sdram_config());
+	params = get_full_k_param();
+
+	//if (!params->have_full_k_params) {
+	if (force_full_k_dram) {
+		int err = dram_blob_load_and_run();
+		if (err == 0) {
+			printk(BIOS_INFO, "dram_blob load success\n");
+			return;
+		}
+		printk(BIOS_ERR, "dram_blob error:%d\n", err);
+	}
+
+	//load params from sdram-ddr-config
+	params = get_sdram_config();
+	mt_mem_init(params);
 }
 
 void platform_romstage_main(void)
@@ -69,5 +95,26 @@
 	pmic_init_scp_voltage();
 	rtc_boot();
 	dram_initialize();
+
+	printk(BIOS_DEBUG, "before do first complex_mem_test \n");
+	for (u8 *addr = (u8*)0x40000000;	addr < (u8*)0x100000000; addr+=0x40000000) {
+		int i = complex_mem_test(addr, 0x50000);
+
+		printk(BIOS_DEBUG, "[MEM]addr:0x%p complex R/W mem test %s : %d\n", addr,
+			(i == 0) ? "pass" : "fail", i);
+
+			ASSERT(i == 0);
+	}
+
 	mtk_mmu_after_dram();
+
+	printk(BIOS_DEBUG, "before do second complex_mem_test \n");
+	for (u8 *addr = (u8*)0x40000000;	addr < (u8*)0x100000000; addr+=0x40000000) {
+		int i = complex_mem_test(addr, 0x50000);
+
+		printk(BIOS_DEBUG, "[MEM]addr:0x%p complex R/W mem test %s : %d\n", addr,
+			(i == 0) ? "pass" : "fail", i);
+
+			ASSERT(i == 0);
+	}
 }

To view, visit change 35110. To unsubscribe, or for help writing mail filters, visit settings.