19 comments:
File src/mainboard/amd/padmelon/Kconfig:
Patch Set #3, Line 20: # select SOC_AMD_MERLINFALCON # missing binaries
Done
Done
Patch Set #3, Line 64: Oddly enough,
Ok, will do.
Done
Patch Set #3, Line 64: Oddly enough,
Ok, will do.
Done
# Don't use AMD's Secure OS
config USE_PSPSECUREOS
def_bool n
I'm not 100% sure now... […]
Done
# Don't use AMD's Secure OS
config USE_PSPSECUREOS
def_bool n
I'm not 100% sure now... […]
Done
File src/mainboard/amd/padmelon/bootblock/OemCustomize.c:
Patch Set #7, Line 18: #define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE
Possibly... will try.
Done
File src/mainboard/amd/padmelon/bootblock/bootblock.c:
Patch Set #7, Line 28: #define SERIAL_DEV PNP_DEV(0x4e, F81803A_SP1)
I was in the past, code moved elsewhere and I missed to remove it. Will do.
Done
Patch Set #7, Line 31: static void full_serial(unsigned int base_port, unsigned int io_enable)
This code is in the process of changing.
Done
Patch Set #7, Line 36: temp |= DECODE_ENABLE_SERIAL_PORT0;
I was doing it only for com port 0, and it's correct. […]
Done
Patch Set #7, Line 38: reg = inb(base_port + UART8250_MCR);
Not sure what you want here, I copied this from an Intel code that also used UART8250_MCR. […]
Done
Patch Set #7, Line 39: reg |= UART8250_MCR_DTR | UART8250_MCR_RTS;
It's needed for my setup, I'll get no serial if I don't enable it. […]
Ack
File src/mainboard/amd/padmelon/fan_init.c:
Patch Set #7, Line 24: #include <soc/pci_devs.h>
Maybe. Some of the code that was initially in this file was moved to fintek folder. Will check.
Done
Patch Set #7, Line 24: #include <soc/pci_devs.h>
Maybe. Some of the code that was initially in this file was moved to fintek folder. Will check.
Done
Patch Set #7, Line 29: celcius
Opss...sorry myself. Will fix. […]
Done
Patch Set #7, Line 29: celcius
Opss...sorry myself. Will fix. […]
Done
Patch Set #7, Line 30: u8 cpu_boudaries[FINTEK_BOUNDARIES_SIZE] = {
probably static. […]
Done
Patch Set #7, Line 30: u8 cpu_boudaries[FINTEK_BOUNDARIES_SIZE] = {
probably static. […]
Done
File src/mainboard/amd/padmelon/gpio.h:
Patch Set #7, Line 19: const struct soc_amd_gpio *early_gpio_table(size_t *size);
Will investigate. […]
Done
File src/mainboard/amd/padmelon/gpio.c:
Patch Set #7, Line 29: const struct soc_amd_gpio gpio_set_stage_reset[] = {
And below too. Will fix.
Ack
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