Angel Pons has uploaded this change for review.

View Change

nb/intel/haswell/northbridge.c: Drop stale comment

This can now be controlled with the `MMCONF_BUS_NUMBER` Kconfig option.

Change-Id: If0fdefc5b4339acc843443c551892b397ed39c2e
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M src/northbridge/intel/haswell/northbridge.c
1 file changed, 0 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/58922/1

diff --git a/src/northbridge/intel/haswell/northbridge.c b/src/northbridge/intel/haswell/northbridge.c
index 2322097..9ead46b 100644
--- a/src/northbridge/intel/haswell/northbridge.c
+++ b/src/northbridge/intel/haswell/northbridge.c
@@ -34,10 +34,6 @@
 	return NULL;
 }
 
-/*
- * TODO: We could determine how many PCIe buses we need in the bar.
- *       For now, that number is hardcoded to a max of 64.
- */
 static struct device_operations pci_domain_ops = {
 	.read_resources    = pci_domain_read_resources,
 	.set_resources     = pci_domain_set_resources,

To view, visit change 58922. To unsubscribe, or for help writing mail filters, visit settings.