Nick Vaccaro has uploaded this change for review.
soc/intel/tigerlake: log the memory part name
THe BIOS log was looking in the spd data for the part name, but part
names are stripped from generic SPDs. In those cases, devices define
their DRAM Part Name in the CBI, which can be retrieved by calling
mainboard_get_dram_part_num().
Add a spd_set_name() call to the spd library to allow logging the memory
part name in cases where the name does not exist in the actual SPD data,
and call it in cases where the mainboard is overriding the part name.
BUG=b:168724473
TEST="emerge-volteer coreboot chromeos-bootimage", flash and boot
volteer to kernel and verify that the BIOS log shows a part name when
logging SPD information:
SPD: module part number is K4U6E3S4AA-MGCL
Change-Id: I91971e07c450492dbb0588abd1c3c692ee0d3bb0
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
---
M src/include/spd_bin.h
M src/lib/spd_bin.c
M src/soc/intel/tigerlake/meminit.c
3 files changed, 24 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/45459/1
diff --git a/src/include/spd_bin.h b/src/include/spd_bin.h
index 11a0084..80c2e62 100644
--- a/src/include/spd_bin.h
+++ b/src/include/spd_bin.h
@@ -47,6 +47,7 @@
int get_spd_cbfs_rdev(struct region_device *spd_rdev, u8 spd_index);
void dump_spd_info(struct spd_block *blk);
void get_spd_smbus(struct spd_block *blk);
+void spd_set_name(uint8_t spd[], char part_name[]);
/*
* get_spd_sn returns the SODIMM serial number. It only supports DDR3 and DDR4.
diff --git a/src/lib/spd_bin.c b/src/lib/spd_bin.c
index 3888896..78c3e98 100644
--- a/src/lib/spd_bin.c
+++ b/src/lib/spd_bin.c
@@ -136,8 +136,23 @@
return spd_busw[index];
}
+static char *spd_dram_part_name;
+static bool spd_part_name_overridden = false;
+void spd_set_name(uint8_t spd[], char *part_name)
+{
+ spd_dram_part_name = part_name;
+ spd_part_name_overridden = true;
+}
+
static void spd_get_name(const uint8_t spd[], char spd_name[], int dram_type)
{
+ /* If memory part name is overridden, use override copy */
+ if (spd_part_name_overridden) {
+ memcpy(spd_name, spd_dram_part_name,
+ strlen(spd_dram_part_name));
+ return;
+ }
+
switch (dram_type) {
case SPD_DRAM_DDR3:
memcpy(spd_name, &spd[DDR3_SPD_PART_OFF], DDR3_SPD_PART_LEN);
diff --git a/src/soc/intel/tigerlake/meminit.c b/src/soc/intel/tigerlake/meminit.c
index 0c6f0b0..a027f2f 100644
--- a/src/soc/intel/tigerlake/meminit.c
+++ b/src/soc/intel/tigerlake/meminit.c
@@ -4,6 +4,7 @@
#include <console/console.h>
#include <fsp/util.h>
#include <soc/meminit.h>
+#include <soc/romstage.h>
#include <spd_bin.h>
#include <string.h>
@@ -216,6 +217,9 @@
static void read_md_spd(const struct spd_info *info, uintptr_t *data, size_t *len)
{
+ const char *spd_name;
+ size_t spd_name_len;
+
if (info->md_spd_loc == SPD_MEMPTR) {
*data = info->data_ptr;
*len = info->data_len;
@@ -225,6 +229,10 @@
die("Not a valid location(%d) for Memory-down SPD!\n", info->md_spd_loc);
}
+ /* if mainboard overrides module name, use override name */
+ if (mainboard_get_dram_part_num(&spd_name, &spd_name_len))
+ spd_set_name((uint8_t *) *data, (char *) spd_name);
+
print_spd_info((uint8_t *) *data);
}
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