4 comments:
File src/cpu/x86/sipi_vector_c_handler.c:
Patch Set #1, Line 70: Enable
Disable
File src/cpu/x86/sipi_vector_c_handler.c:
Patch Set #4, Line 40: intel_microcode_load_unlocked
The update trigger mechanism is the same for AMD CPUs (wrmsr 0x79), maybe that can be placed in a more generic place as this seems to do more Intel specific things?
Patch Set #4, Line 70: Enable
Disable
File src/include/cpu/x86/mp.h:
Patch Set #4, Line 162: /* This also needs to match the assembly code for saved MSR encoding. */
stale comment.
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