Furquan Shaikh uploaded patch set #5 to this change.

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soc/amd/picasso: Enable eSPI capability for Picasso

This change selects SOC_AMD_COMMON_BLOCK_HAS_ESPI which enables
the capability for using eSPI on Picasso.

Additionally, it also calls espi_setup() and espi_configure_decodes()
if mainboard enables use of eSPI and skips LPC decodes in that case.

BUG=b:153675913,b:154445472

Change-Id: I4876f1bff4305a23e8ccc48a2d0d3b64cdc9703d
Signed-off-by: Furquan Shaikh <furquan@google.com>
---
M src/soc/amd/picasso/Kconfig
M src/soc/amd/picasso/southbridge.c
2 files changed, 17 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/41075/5

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I4876f1bff4305a23e8ccc48a2d0d3b64cdc9703d
Gerrit-Change-Number: 41075
Gerrit-PatchSet: 5
Gerrit-Owner: Furquan Shaikh <furquan@google.com>
Gerrit-Reviewer: Aaron Durbin <adurbin@chromium.org>
Gerrit-Reviewer: Raul Rangel <rrangel@chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-MessageType: newpatchset