Kyösti Mälkki has uploaded this change for review.

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mb/pcengines/apu2: Remove gpio1_ and gpio2_ references

The banks are one after each other in the ACPIMMIO space.
Also there is space for more banks and existing ASL also
takes advantage of this property.

Change-Id: I348ba43a76287be5b24012ae3dfc28ed783da9c7
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
---
M src/mainboard/pcengines/apu2/gpio_ftns.c
1 file changed, 8 insertions(+), 15 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/42521/1

diff --git a/src/mainboard/pcengines/apu2/gpio_ftns.c b/src/mainboard/pcengines/apu2/gpio_ftns.c
index c249c2d..03eddce 100644
--- a/src/mainboard/pcengines/apu2/gpio_ftns.c
+++ b/src/mainboard/pcengines/apu2/gpio_ftns.c
@@ -10,27 +10,20 @@
 static u32 gpio_read_wrapper(u32 iomux_gpio)
 {
 	u32 gpio = iomux_gpio << 2;
+	if (gpio >= 0x300)
+		die("Invalid GPIO");
 
-	if (gpio < 0x100)
-		return gpio0_read32(gpio & 0xff);
-	else if (gpio >= 0x100 && gpio < 0x200)
-		return gpio1_read32(gpio & 0xff);
-	else if (gpio >= 0x200 && gpio < 0x300)
-		return gpio2_read32(gpio & 0xff);
+	return gpio0_read32(gpio & 0x3ff);
 
-	die("Invalid GPIO");
 }
 
 static void gpio_write_wrapper(u32 iomux_gpio, u32 setting)
 {
 	u32 gpio = iomux_gpio << 2;
+	if (gpio >= 0x300)
+		die("Invalid GPIO");
 
-	if (gpio < 0x100)
-		gpio0_write32(gpio & 0xff, setting);
-	else if (gpio >= 0x100 && gpio < 0x200)
-		gpio1_write32(gpio & 0xff, setting);
-	else if (gpio >= 0x200 && gpio < 0x300)
-		gpio2_write32(gpio & 0xff, setting);
+	gpio0_write32(gpio & 0x3ff, setting);
 }
 
 void configure_gpio(u32 gpio, u8 iomux_ftn, u32 setting)
@@ -70,9 +63,9 @@
 	 * One SPD file contains all 4 options, determine which index to
 	 * read here, then call into the standard routines.
 	 */
-	if (gpio1_read8(0x02) & BIT0)
+	if (read_gpio(GPIO_49))
 		index |= BIT0;
-	if (gpio1_read8(0x06) & BIT0)
+	if (read_gpio(GPIO_50))
 		index |= BIT1;
 
 	return index;

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