1 comment:
File src/soc/intel/cannonlake/acpi/northbridge.asl:
Patch Set #4, Line 43: 31:15
Thanks for the pointer.
here is my findings
1. In coreboot we are always programming MCHBAR as 32bit value
https://github.com/coreboot/coreboot/blob/master/src/soc/intel/common/block/systemagent/systemagent_early.c#L87
https://github.com/coreboot/coreboot/blob/50ee91c17c386b47e8d3c02bbdcc9e1324c9a72f/src/soc/intel/cannonlake/romstage/systemagent.c#L27
MCHBAR offset = 48 value = fed10000
2. Dumping the same from common northbridge.asl shows the same 32bit value using APRT
>> APRT (\_SB.PCI0.GMHB ())
0x00000000FED10000
i guess the issue could be if MCHBAR is more than 32 bit value then all above assumptions will fail.
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