Martin Roth uploaded patch set #4 to this change.

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soc/amd/common: Don't init SMIs or SCIs in psp_verstage

We can't set the SMI or SCI flags in psp verstage, so skip them.

TEST=Build
BUG=b:154142138

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I40eb464cde6b233607de1e177702c643ea2b4bb2
---
M src/soc/amd/common/block/gpio_banks/gpio.c
1 file changed, 13 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/42765/4

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I40eb464cde6b233607de1e177702c643ea2b4bb2
Gerrit-Change-Number: 42765
Gerrit-PatchSet: 4
Gerrit-Owner: Martin Roth <martinroth@google.com>
Gerrit-Reviewer: Aaron Durbin <adurbin@chromium.org>
Gerrit-Reviewer: Raul Rangel <rrangel@chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
Gerrit-MessageType: newpatchset