Felix Singer submitted this change.

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Approvals: build bot (Jenkins): Verified Patrick Rudolph: Looks good to me, approved
mb/hp/snb_ivb_desktops: Convert remaining PCI numbers into references

Change-Id: I31e348ba5954bc463f43e769ddb4aed413faf193
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80046
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
M src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/overridetree.cb
M src/mainboard/hp/snb_ivb_desktops/variants/z220_sff_workstation/overridetree.cb
2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/overridetree.cb b/src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/overridetree.cb
index 55bdaac..3634b90 100644
--- a/src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/overridetree.cb
@@ -3,16 +3,16 @@
chip northbridge/intel/sandybridge
device domain 0 on
subsystemid 0x103c 0x1791 inherit
- device pci 06.0 on end # Extra x4 port on north bridge
+ device ref peg60 on end # Extra x4 port on north bridge
chip southbridge/intel/bd82x6x
register "sata_port_map" = "0x3f"

- device pci 1c.1 on end # PCIe Port #2
- device pci 1c.2 on end # PCIe Port #3
- device pci 1c.3 on end # PCIe Port #4
- device pci 1c.5 on end # PCIe Port #6
- device pci 1c.6 on end # PCIe Port #7
- device pci 1c.7 on end # PCIe Port #8
+ device ref pcie_rp2 on end # PCIe Port #2
+ device ref pcie_rp3 on end # PCIe Port #3
+ device ref pcie_rp4 on end # PCIe Port #4
+ device ref pcie_rp6 on end # PCIe Port #6
+ device ref pcie_rp7 on end # PCIe Port #7
+ device ref pcie_rp8 on end # PCIe Port #8
end
end
end
diff --git a/src/mainboard/hp/snb_ivb_desktops/variants/z220_sff_workstation/overridetree.cb b/src/mainboard/hp/snb_ivb_desktops/variants/z220_sff_workstation/overridetree.cb
index c31bf33..8b827f8 100644
--- a/src/mainboard/hp/snb_ivb_desktops/variants/z220_sff_workstation/overridetree.cb
+++ b/src/mainboard/hp/snb_ivb_desktops/variants/z220_sff_workstation/overridetree.cb
@@ -6,7 +6,7 @@

chip southbridge/intel/bd82x6x
register "sata_port_map" = "0xf"
- device pci 1c.4 on end # dummy setting
+ device ref pcie_rp5 on end # dummy setting
end
end
end

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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I31e348ba5954bc463f43e769ddb4aed413faf193
Gerrit-Change-Number: 80046
Gerrit-PatchSet: 3
Gerrit-Owner: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Gerrit-Reviewer: Nicholas Chin <nic.c3.14@gmail.com>
Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph@9elements.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: merged